Skip to main content

Posts

Showing posts from August, 2022

Design Engineer - STA, SD, Power, PDN at Dew Software

Hello Dear Readers,   Currently at Dew Software Bangalore vacancy for Design Engineer - STA, SD, Power, PDN role. Dew Software, a leading player in the Digital Transformation space, is seeking a skilled Design Engineer specializing in STA (Static Timing Analysis), SD (Signal Integrity), Power, and PDN (Power Delivery Network) to join our team. Working with Fortune 500 companies to support their digital innovation and transformation strategies, the Design Engineer will be responsible for ensuring the integrity and efficiency of digital designs through comprehensive analysis and optimization. Dew Software is dedicated to delivering exceptional outcomes with cutting-edge technologies, and this is an excellent opportunity to contribute to the growth and success of our clients. Responsibilities: Perform STA (Static Timing Analysis) to ensure design meets timing requirements Conduct signal integrity analysis to optimize signal integrity and minimize signal integrity issues Provide power anal

Physical Design Engineer at IBM Bangalore

  Hello Dear Readers,   Currently, at IBM Bangalore vacancy for a Physical Design Engineer role. Introduction: As a Hardware Developer at IBM, you’ll get to work on the systems that are driving the quantum revolution and the AI era. Join an elite team of engineering professionals who enable IBM customers to make better decisions quicker on the most trusted hardware platform in today’s market. Your Role and Responsibilities: Responsible for high-performance microprocessor blocks RTL to GDSII implementation Perform block level synthesis, floor planning, placement, and routing. Close the design to meet timing, power budget, and area. Implement ECOs to address functional bugs and timing violations. Team player with good problem-solving and communication skills. Required Technical and Professional Expertise: 1-3 years of industry experience in physical design methodology. Good knowledge and hands on experience in physical design methodology which include logic synthesis, placement, clock tr

RTL FPGA Engineer at Optimized Solutions

   Hello Dear Readers,   Currently at Optimized Solutions Gandhinagar, Gujarat vacancy for RTL FPGA Engineer role. About the job: Design and RTL Coding using Verilog and/ or VHDL, Design Verification FPGA Synthesis, Place & Route, timing verification, Programming Lab-based analysis and debug on Hardware platforms FPGA prototyping . 2-5 Years of Experience in FPGA Design & Development BE/ BTECH/ ME/ MTECH in EC/ EE/ CS or related field Experience of VHDL and/ or Verilog programming languages Exposure to industry std FPGA design tools. Mandatory Skills: RTL / Logic Development in VHDL/Verilog Full FPGA development flow from logic design, place route, timing analysis closure Experience with advanced Xilinx/Intel FPGA families and the Xilinx/Intel development tools including Vivado/Quartus Making test benches for functional simulation of IP/FPGA design Troubleshooting and debugging FPGA implementations on boards Knowledge of any scripting language such as bash/Perl/python Highly mo

Engineer I - Verification at Microchip Bangalore

  Hello Dear Readers,   Currently at Microchip Bangalore vacancy for Engineer I - Verification role. Job Description: Define and develop verification architecture Define and develop verification methodologies Define and develop verification environments Write verification specifications, verification plans, and documentation Generate test bench and automatic regression plans Be responsible for verification architecture, simulations, verifications, and debugging of circuit and logic designs Complete block-level verification and chip level verification Bring a self-motivated and enthusiastic approach that will achieve any new requirements and overcome all challenges Able to debug the RTL for design intent and Interface with cross-functional teams and collaboration in all verification related activities Mentor Junior Engineers on need basis   Requirements/Qualifications: Master's degree in VLSI design. Languages (Must) : Verilog and System Verilog. Methodologies (Any one) : OVM, VMM.,

Application Specific Integrated Circuit Design Engineer at AumRaj Design Systems

  Hello Dear Readers,   Currently at AumRaj Design Systems vacancy for Application Specific Integrated Circuit Design Engineer role. Responsibilities: Design and implement verification test plans, test benches, assertions, coverage, infrastructure, and platforms. Work with ASIC designers, and architects to produce thoroughly verified robust IP products. Develop and improve existing verification flows and methodologies in collaboration with other verification team members. Assist with bring-up and debugging of hardware projects. Qualifications: BS/BE or MS/ME degree in EC or computer engineering or closely related degree strongly preferred; but substantial, relevant, outstanding work experience may substitute in some cases. Strong written and verbal communication skills in English. Solid understanding of standard ASIC verification techniques, including Test planning Testbench creation Code and Functional coverage Directed and random stimulus generation Assertions Solid understanding of

GPU Implementation Engineer at Qualcomm

   Hello Dear Readers, Currently at Qualcomm Bangalore vacancy for GPU Implementation Engineer role. Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: Participate in the development of ASICs, with emphasis in Constraint development, Synthesis, Static Timing Analysis (STA), Power Estimation and driving clock tree synthesis. Create design of experiments and do detailed PPA comparison analysis to improve quality of results, tuning recipes and setting course for the projects going forward. Work closely with RTL design, DFT, PD Implementation, Power  teams to optimize Performance, Power and Area (PPA) for best PPA Proficient in constraint generation and validation. Tabulate metrics results for analysis comparison. Develop Rapid Physical synthesis Convergence Methodologies and Automation for optimal PPA. Help all team members in resolving their technical queries and keep project on track. Develop new flow and methodologies to keep improving QOR. Minimu

Engineer I-Silicon Validation at Seagate

  Hello Dear Readers,   Currently at Seagate Pune  vacancy for Engineer I-Silicon Validation role. About our group: The group is part of Seagate's VLSI Organization spread globally across multiple sites. Seagate designs world-class controller SoCs for their HDDs. The group in Pune participates in the design, verification, physical design, and post-silicon validation activities of these complex SoCs. This group has some of the best talents from the industry and has taped out many controller chips.    About the role - you will: Participate in SoC post-silicon validation activities on HDD controllers such as Firmware development/enhancements for silicon validation Participate in Validation test plan development for specific IP Codes Work in Board/SoC to bring up participation, test plan execution and result logging Collect debugging data using standard tools like protocol analyzers, logic analyzers, oscilloscopes   About you: Good  knowledge of Electronics Ability to work under pressu

Physical Design Engineer at NVIDIA

   Hello Dear Readers, Currently at Nvidia Bangalore vacancy for Physical Design Engineer role. NVIDIA is seeking passionate, highly motivated, and creative design engineers to be part of a team working on industry-leading GPUs and SOCs. This position offers the opportunity to have real impact in a dynamic, technology-focused company impacting product lines ranging from consumer graphics to self-driving cars and the growing field of artificial intelligence. We have crafted a team of exceptional people stretching around the globe, whose mission is to push the frontiers of what is possible today and define the platform for the future of computing. What you'll be doing: In this position, you will be expected to lead all block/chip level PD activities. PD activities includes floor plans, abstract view generation, RC extraction, PNR, STA, EM,IR DROP, DRCs & schematic to layout verification. Work in collaboration with design team for addressing design challenges. Help team members in

Physical Design Engineer at Synopsys

   Hello Dear Readers, Currently at Synopsys Bangalore vacancy for Physical Design Engineer role. At Synopsys, they are at the heart of the innovations that change the way we work and play. Self-driving cars. Artificial Intelligence. The cloud. 5G. The Internet of Things. These breakthroughs are ushering in the Era of Smart Everything. And we’re powering it all with the world’s most advanced technologies for chip design and software security. If you share our passion for innovation, we want to meet you. Silicon IP Subsystems business is all about integrating more capabilities into an SoC—faster. We offer the world’s broadest portfolio of silicon IP—predesigned blocks of logic, memory, interfaces, analog, security, and embedded processors. All to help customers integrate more capabilities. Meet unique performance, power, and size requirements of their target applications. And get differentiated products to market quickly with reduced risk. R&D Engineer We are looking for a PD Engine