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Physical Design Methodology Engineer at Texas Instruments

  Hello Dear Readers, Texas Instruments Bangalore has a vacancy for the Physical Design Engineer role. We need an Physical Design Methodology Engineer to join our ATD team. The candidate should have a strong background in back-end design of ASIC/SoC chips. The ideal candidate will have a bachelor’s or master’s degree in Electrical Engineering or a related field. Requirements: 1 - 2 Years of experience in physical design Bachelor’s or master’s degree in Electrical/Electronics Engineering or a related field Strong understanding of physical design principles Must know the basics of floorplan, placement, CTS, routing, ECO, Physical Verification Proficiency in back-end design tools, such as Cadence Genus/Innovus/Tempus/Voltus Excellent problem-solving skills and attention to detail Effective communication and collaboration skills Responsibilities: Synthesis to GDSII Perform full Physical design flow and its verification Work closely with Digital Design and DFT engineers Ensure...
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RTL FPGA Engineer at Optimized Solutions

  Hello Dear Readers, 

Currently at Optimized Solutions Gandhinagar, Gujarat vacancy for RTL FPGA Engineer role.

About the job:

Design and RTL Coding using Verilog and/ or VHDL, Design Verification FPGA Synthesis, Place & Route, timing verification, Programming Lab-based analysis and debug on Hardware platforms FPGA prototyping .

2-5 Years of Experience in FPGA Design & Development BE/ BTECH/ ME/ MTECH in EC/ EE/ CS or related field Experience of VHDL and/ or Verilog programming languages Exposure to industry std FPGA design tools.

Mandatory Skills:

  • RTL / Logic Development in VHDL/Verilog
  • Full FPGA development flow from logic design, place route, timing analysis closure
  • Experience with advanced Xilinx/Intel FPGA families and the Xilinx/Intel development tools including Vivado/Quartus
  • Making test benches for functional simulation of IP/FPGA design
  • Troubleshooting and debugging FPGA implementations on boards
  • Knowledge of any scripting language such as bash/Perl/python
  • Highly motivated, self-starter with good interpersonal skills and a strong team player
  • Excellent communication, critical thinking, and problem-solving skills

Desired Skills:

  • Sound knowledge and experience of Verilog or VHDL for FPGA based design.
  • Experience of using Xilinx Vitis Unified Software Platform, Vivado design Suit, HLS etc.
  • Experience of using Intel Quartus Prime Design Software and Nios Embedded Design Suite.
  • Experience on Altera/ Xilinx SOC FPGA (Zynq, MPSOC, Stratix/ARRIA SOC etc.).
  • Knowledge of interfaces like High speed ADCs/DACs, PCIe, USB, Ethernet, SerDES Memories like DDR etc.
  • Good Logic ability and Digital Fundamentals.
  • Good general engineering fundamentals.
  • Excellent teamwork and people skills.

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