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Showing posts from November, 2022

ASIC Design Verification Engineer at Juniper Networks

Hello Dear Readers, Currently, at Juniper Networks Banglore vacancy for an ASIC Design Verification Engineer role. Juniper is a leading provider of advanced routers and switches for the internet. We keep the world connected with speed, reliability, security, and ease of use. We believe in excellence and we strive to achieve that through employee motivation, training, and teamwork within a collaborative and innovative culture. Want to be a part of a fast-paced team responsible for delivering high-speed ASICs for large, complex systems? Our team at Silicon Systems Technology Group (SST) is seeking ASIC Verification Engineers to verify the next generation of ASICs for new core routers, switches, and firewalls. We are looking to hire sharp individuals with excellent communication, problem-solving, and leadership skills. Responsibilities: You will be exposed to the latest verification methodologies like UVM and enable complex feature verification suites. Architect and Develop block level

Silicon CPU/ SOC Verification Engineer at Rivos Inc

Hello Dear Readers, Currently at Rivos Bangalore vacancy for a Silicon CPU/ SOC Verification Engineer role. Positions are open for full-time and Co-op/internship in the areas of CPU and SOC verification from unit level to chip level as well as all aspects of verification such as functional, microarchitecture, performance, and formal. We are looking for all levels of talent, from entrance to advanced level of experience. Responsibilities: Work closely with architecture and RTL designers on verifying the functionality correctness of the design Reviewing Architecture and Design Specifications Develop test plans and test environments Develop tests in assembly, C/C++, or vectors according to test plans Develop coverage monitors and analyze coverage to ensure all the test cases in the plans are covered Develop checkers in SystemVerilog or C-base transactors to verify the design Write assertions and apply formal verification to the designImplementing test benches, generating directed/cons

ASIC Engineer at NVIDIA Bangalore

Hello Dear Readers, Currently at Nvidia Bangalore vacancy for an ASIC Engineer role. NVIDIA is seeking elite ASIC Low power Design and Verification engineers to work on the design, implementation, and verification of low-power features for the world’s leading SoCs and GPUs. This position offers the opportunity to have real impact in a dynamic, technology-focused company impacting product lines ranging from consumer graphics to self-driving cars and the growing field of artificial intelligence. We have crafted a team of outstanding people stretching around the globe, whose mission is to push the frontiers of what is possible today and define the platform for the future of computing. At NVIDIA, our employees are passionate about parallel and visual computing. We're united in our quest to transform the way graphics are used to solve some of the most complex problems in computer science. The GPU started out as an engine for simulating human imagination, conjuring up the amazing virt

ASIC Design for Testability Engineer at Google

Hello Dear Readers, Currently, Google Bangalore has a vacancy for an ASIC Design for Testability Engineer. Minimum qualifications: Bachelor's degree in Electrical Engineering or equivalent practical experience. Experience with ATPG, LV, BIST, JTAG tools and flow. Experience in DFT of IPs (e.g., CPU, GPU, DDR). Preferred qualifications: Knowledge of high-performance design DFT techniques. Ability to scale DFT, with a focus on minimal area overhead. Understanding of the end-to-end flows of Design, Verification, DFT, and PD. Proficient with a scripting language such as Perl. Proficient with Synthesis, Lint, CDC, LEC and DFT timing, and STA. Responsibilities: Work on a team of DFT engineers, working closely with RTL and Physical Designer engineers. Write basic to complex scripts to automate the DFT flow. Develop tests that can be used for Production in the ATE flow. Communicate and work with multi-disciplined and multi-site teams. Apply Here Connect with me 1.Linkedln

VLSI Digital Design Engineer at InnoPhase, Inc.

Hello Dear Readers, Currently, InnoPhase Bangalore has a vacancy for a VLSI Digital Design Engineer role. INNOPHASE is a rapidly growing pre-IPO communications semiconductor company with headquarters in San Diego, CA, and advanced design centers in Irvine, CA, San Jose, CA, and Bangalore, India. We are pioneering a revolutionary 5G platform that will transform cellular network deployments. Utilizing our breakthrough, patented, wireless technology we are bringing to market a portfolio of SoCs and solutions with a unique value proposition for 5G applications. As a VLSI Design Engineer, you will be collaborating with a team of design engineers to develop novel ORAN SoC products for high-performance applications such as LTE and sub-6 GHz 5G cellular base stations. You will also be contributing to functional block design and integration to meet detailed device performance requirements. This role is an excellent opportunity for someone that enjoys learning and making a significant impa

CPU Hardware Architect at Imagination

Hello Dear Readers, Currently, Imagination has a vacancy for a CPU Hardware Architect role. The role is for our fast-growing CPU Hardware team. We are expanding our CPU IP development from internal use to support an extensive portfolio offering highly competitive RISC-V CPUs, either as standalone IPs or as part of Imagination’s Heterogeneous Compute offering, which includes our world-class GPU and NNA compute elements. Our mission is to create through constant innovation the best-in-class RISC-V CPUs for a wide range of market segments and applications. Reporting to the Vice President of CPU HW Engineering, we are looking for an individual with proven technical leadership and applied knowledge of various Computer and CPU architecture and micro-architecture topics. The successful candidate will be join our CPU Architecture team which is responsible for defining the CPU micro-architecture, influencing the evolution of the RISC-V ISA and working with customers and ecosystem partners to

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