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Discover New Horizons with CG SEMI Job Opportunity

  Hello, Dear Readers,   Currently at CG SEMI has multiple job vacancies in semiconductors.  Apply Here Connect with me  1.Linkedln 2.Instagram 3.Facebook 4.WhatsApp
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ASIC Design for Testability Engineer at Google

 Hello Dear Readers,

Currently, Google Bangalore has a vacancy for an ASIC Design for Testability Engineer.

Minimum qualifications:

  • Bachelor's degree in Electrical Engineering or equivalent practical experience.
  • Experience with ATPG, LV, BIST, JTAG tools and flow.
  • Experience in DFT of IPs (e.g., CPU, GPU, DDR).

Preferred qualifications:

  •  Knowledge of high-performance design DFT techniques.
  •  Ability to scale DFT, with a focus on minimal area overhead.
  •  Understanding of the end-to-end flows of Design, Verification, DFT, and PD.
  •  Proficient with a scripting language such as Perl.
  •  Proficient with Synthesis, Lint, CDC, LEC and DFT timing, and STA.

Responsibilities:

  • Work on a team of DFT engineers, working closely with RTL and Physical Designer engineers. 
  • Write basic to complex scripts to automate the DFT flow.
  • Develop tests that can be used for Production in the ATE flow. 
  • Communicate and work with multi-disciplined and multi-site teams.

 Connect with me 

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