Hello Dear Readers, Currently at Dew Software Bangalore vacancy for Design Engineer - STA, SD, Power, PDN role. Dew Software, a leading player in the Digital Transformation space, is seeking a skilled Design Engineer specializing in STA (Static Timing Analysis), SD (Signal Integrity), Power, and PDN (Power Delivery Network) to join our team. Working with Fortune 500 companies to support their digital innovation and transformation strategies, the Design Engineer will be responsible for ensuring the integrity and efficiency of digital designs through comprehensive analysis and optimization. Dew Software is dedicated to delivering exceptional outcomes with cutting-edge technologies, and this is an excellent opportunity to contribute to the growth and success of our clients. Responsibilities: Perform STA (Static Timing Analysis) to ensure design meets timing requirements Conduct signal integrity analysis to optimize signal integrity and minimize signal integrity issues Provide power anal
Hello Dear Readers, Currently, at Smart Chip Design vacancy for a Jr. ASIC Verification Engineer role. Smart Chip Design is a provider of VLSI (Very Large Scale Integration) training courses and advanced VLSI design in Bengaluru, Karnataka. We strive to offer the best training programs in the industry, in addition to delivering top-quality design services. Our mission is to empower engineers with the skills and expertise they need to create innovative and cutting-edge products that can make a difference in the world. Role Description: This is a full-time remote role for a Jr. ASIC verification engineer. The Jr. ASIC (Application-Specific Integrated Circuit) Verification Engineer will be responsible for ensuring the correctness of complex ASIC designs through a variety of tools and methodologies. The engineer will collaborate with cross-functional teams to identify issues and provide customized solutions and will work closely with designers and other verification engineers to create ef