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Physical Design Methodology Engineer at Texas Instruments

  Hello Dear Readers, Texas Instruments Bangalore has a vacancy for the Physical Design Engineer role. We need an Physical Design Methodology Engineer to join our ATD team. The candidate should have a strong background in back-end design of ASIC/SoC chips. The ideal candidate will have a bachelor’s or master’s degree in Electrical Engineering or a related field. Requirements: 1 - 2 Years of experience in physical design Bachelor’s or master’s degree in Electrical/Electronics Engineering or a related field Strong understanding of physical design principles Must know the basics of floorplan, placement, CTS, routing, ECO, Physical Verification Proficiency in back-end design tools, such as Cadence Genus/Innovus/Tempus/Voltus Excellent problem-solving skills and attention to detail Effective communication and collaboration skills Responsibilities: Synthesis to GDSII Perform full Physical design flow and its verification Work closely with Digital Design and DFT engineers Ensure...

Design Engineer - STA, SD, Power, PDN at Dew Software

Hello Dear Readers, 

Currently at Dew Software Bangalore vacancy for Design Engineer - STA, SD, Power, PDN role.

Dew Software, a leading player in the Digital Transformation space, is seeking a skilled Design Engineer specializing in STA (Static Timing Analysis), SD (Signal Integrity), Power, and PDN (Power Delivery Network) to join our team. Working with Fortune 500 companies to support their digital innovation and transformation strategies, the Design Engineer will be responsible for ensuring the integrity and efficiency of digital designs through comprehensive analysis and optimization. Dew Software is dedicated to delivering exceptional outcomes with cutting-edge technologies, and this is an excellent opportunity to contribute to the growth and success of our clients.

Responsibilities:

  • Perform STA (Static Timing Analysis) to ensure design meets timing requirements
  • Conduct signal integrity analysis to optimize signal integrity and minimize signal integrity issues
  • Provide power analysis and optimization to ensure power integrity and efficiency
  • Design and optimize power delivery networks (PDN) for optimal performance
  • Collaborate with cross-functional teams to meet project objectives and deliver high-quality designs within the specified timeframes
  • Conduct design debugging and troubleshooting activities to resolve issues
  • Generate and maintain design documentation and specifications
  • Stay up-to-date with industry trends and advancements in design methodologies and tools related to STA, SD, Power, and PDN
  • Ensure compliance with design standards and quality requirements

Requirements:

  • PPA Focus will be on the technology and methodology of the 18A on some of the critical ARM cores
  • Design tricks to improve PPA of high speed and low power cores
  • Tool improvements
  • They should be fully familiar with execution

Benefits:

  • Azure Infrastructure Experience: Proficiency in managing Azure infrastructure components, including virtual machines, storage, and networking, to support AI model development and deployment
  • CI/CD Pipeline Experience: Experience with Continuous Integration/Continuous Deployment (CI/CD) pipelines, including the automation of model deployment processes
  • Containerization in the Cloud: Strong knowledge of containerization technologies in the cloud, such as Docker and Kubernetes, for efficient deployment and scaling of machine learning models
  • Machine Learning Expertise: Proficient in building and optimizing machine learning models, with a deep understanding of various ML algorithms and frameworks
  • Programming Skills: Proficiency in programming languages commonly used in machine learning, such as Python and libraries like TensorFlow and PyTorch
  • Data Management: Experience in data preprocessing, feature engineering, and data pipeline development for machine learning
  • Collaborative Team Player: Excellent communication skills and the ability to work collaboratively with cross-functional teams, including AI engineers and SREs
  • Documentation: Effective documentation skills to maintain clear and organized records of models, infrastructure configurations, and incident responses



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