Hello, Dear Readers,
Skyroot Aerospace has a vacancy for the RTL Design Engineer role.
About Skyroot Aerospace:
A cutting-edge startup founded by ex-ISRO scientists. Dedicated to affordable space access, we're rewriting aerospace technology rules. Our dynamic team fosters inventiveness, collaboration, and relentless excellence. Join us on a transformative journey to redefine space possibilities. Welcome to the forefront of space innovation with Skyroot Aerospace!
Purpose of role:
Understand architectural requirements and Design micro-architecture, implement design blocks using VHDL/Verilog for FPGA based Avionics packages for orbital launch vehicles and ground infrastructure.
Job Requirements:
- 2+ Years of RTL and system design experience.
- Strong knowledge on Digital System Design (DSD).
- Strong knowledge of RTL/SoC design/integration with VHDL/Verilog.
- Strong knowledge in problem solving and debugging skills.
- Ability to understand architectural requirements and Design micro-architecture, implement design blocks using VHDL/Verilog and deliver a fully verified, synthesized/timing-clean design.
- Knowledge and experience in interface communication protocols.
- Strong experience in Synthesis, timing & front-end design tools. Experience with AMD Xilinx family of tools is a strong plus.
- Knowledge of AMBA AHB/AXI protocol is a strong plus.
- Working knowledge on code coverage and functional coverage.
- IP development and coding using standard coding guidelines knowledge.
- Excellent communication skills. Must participate in and contribute to internal meetings.
- Team player, can-do attitude, and ability to work in a group environment while contributing on an individual basis.
- Dexterity with test equipment (Logic Analyzers, Oscilloscopes, Signal Generators, DMMs, Benchtop DC Power Supplies, etc.) is required.
- Experience with working with FPGA/SoC/MCU on custom hardware, evals boards, development bard etc.
- Basic Understanding of circuit configurations: Voltage divider, Pull-up / Pull-down circuits, Inverting / Non-inverting amplifier, Active/Passive filters, MOSFET-based switches, ADC/DAC is a plus.
Job Responsibility:
- Understand architectural requirements and deliver synthesize/timing-clean, scalable design for target FPGAs.
- Verify functionality of design using RTL and gate level simulations and testbenches.
- Work with cross-disciplinary teams and assist in board bring-up as and when required.
- Contribute to internal design reviews to ensure adherence with company RTL design policies.
- Analyse architectural trade-offs based on system requirements, features, and performance limitations.
Essential:
- Bachelors/Masters in Electronics Engineering (ECE/EEE/EIE).
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