Hello Dear Readers, Qualcomm Bangalore currently has a vacancy for an SRAM/Memory CAD Engineer. As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products. Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performance requirements. Minimum Qualifications: • Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 3+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronic...
Hello Dear Readers,
Currently at Qualcomm Bangalore vacancy for GPU Implementation Engineer role.
Job Area:
Engineering Group, Engineering Group > Hardware Engineering
General Summary:
- Participate in the development of ASICs, with emphasis in Constraint development, Synthesis, Static Timing Analysis (STA), Power Estimation and driving clock tree synthesis.
- Create design of experiments and do detailed PPA comparison analysis to improve quality of results, tuning recipes and setting course for the projects going forward.
- Work closely with RTL design, DFT, PD Implementation, Power teams to optimize Performance, Power and Area (PPA) for best PPA
- Proficient in constraint generation and validation.
- Tabulate metrics results for analysis comparison.
- Develop Rapid Physical synthesis Convergence Methodologies and Automation for optimal PPA.
- Help all team members in resolving their technical queries and keep project on track.
- Develop new flow and methodologies to keep improving QOR.
Minimum Qualifications:
- 1-3 years of experience in ASIC Physical synthesis/STA
- Expertise in Synopsys/Cadence Synthesis tools
- Expertise with STA with prime time/Tempus.
- Good Experience in synthesis timing closure and interactions with DFT and PD.
- Expertise in Low power flows for CLP, UPF ( Cadence low power, Unified power format)
- Experience in formal verification with Cadence LEC
- Expertise in ECO flows using conformal/Formality ECO.
- Experience in Spyglass Lint/CDC checks and waiver creation
- Experience in RTL HDL languages Verilog/VHDL.
- Understanding of RTL to GDS flow
- Expertise in Perl, TCL language
- Excellent collaboration skill with all stakeholders is a must.
- Excellent communication skills are a must.
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