Hello Dear Readers, Currently at Dew Software Bangalore vacancy for Design Engineer - STA, SD, Power, PDN role. Dew Software, a leading player in the Digital Transformation space, is seeking a skilled Design Engineer specializing in STA (Static Timing Analysis), SD (Signal Integrity), Power, and PDN (Power Delivery Network) to join our team. Working with Fortune 500 companies to support their digital innovation and transformation strategies, the Design Engineer will be responsible for ensuring the integrity and efficiency of digital designs through comprehensive analysis and optimization. Dew Software is dedicated to delivering exceptional outcomes with cutting-edge technologies, and this is an excellent opportunity to contribute to the growth and success of our clients. Responsibilities: Perform STA (Static Timing Analysis) to ensure design meets timing requirements Conduct signal integrity analysis to optimize signal integrity and minimize signal integrity issues Provide power anal
Hello Dear Readers,
Currently at AumRaj Design Systems vacancy for Application Specific Integrated Circuit Design Engineer role.
Responsibilities:
- Design and implement verification test plans, test benches, assertions, coverage, infrastructure, and platforms.
- Work with ASIC designers, and architects to produce thoroughly verified robust IP products.
- Develop and improve existing verification flows and methodologies in collaboration with other verification team members. Assist with bring-up and debugging of hardware projects.
Qualifications:
- BS/BE or MS/ME degree in EC or computer engineering or closely related degree strongly preferred; but substantial, relevant, outstanding work experience may substitute in some cases.
- Strong written and verbal communication skills in English.
- Solid understanding of standard ASIC verification techniques, including Test planning
- Testbench creation
- Code and Functional coverage
- Directed and random stimulus generation Assertions
- Solid understanding of verification methodologies and one or more of the following standard testbench languages: System Verilog (OVM/UVM)
- C/C++
- Comfortable in a Unix development environment (make, scripting, SVN, etc.)
Personal Attributes:
- Able and willing to work in a team-oriented, collaborative environment
- A demonstrated ability to prioritize and execute tasks so as to achieve goals in an innovative, fast-paced, and often high-pressure environment
- Proven analytical and creative problem-solving abilities.
- Passionate about writing clean and neat code that adheres to coding guidelines.
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