Hello, Dear Readers, Skyroot Aerospace has a vacancy for the RTL Design Engineer role. About Skyroot Aerospace: A cutting-edge startup founded by ex-ISRO scientists. Dedicated to affordable space access, we're rewriting aerospace technology rules. Our dynamic team fosters inventiveness, collaboration, and relentless excellence. Join us on a transformative journey to redefine space possibilities. Welcome to the forefront of space innovation with Skyroot Aerospace! Purpose of role: Understand architectural requirements and Design micro-architecture, implement design blocks using VHDL/Verilog for FPGA based Avionics packages for orbital launch vehicles and ground infrastructure. Job Requirements: 2+ Years of RTL and system design experience. Strong knowledge on Digital System Design (DSD). Strong knowledge of RTL/SoC design/integration with VHDL/Verilog. Strong knowledge in problem solving and debugging skills. Ability to understand architectural requirements and Design micro-archite...
Hello Dear Readers,
Currently at Microchip Bangalore vacancy for Engineer I - Verification role.
Job Description:
- Define and develop verification architecture
- Define and develop verification methodologies
- Define and develop verification environments
- Write verification specifications, verification plans, and documentation
- Generate test bench and automatic regression plans
- Be responsible for verification architecture, simulations, verifications, and debugging of circuit and logic designs
- Complete block-level verification and chip level verification
- Bring a self-motivated and enthusiastic approach that will achieve any new requirements and overcome all challenges
- Able to debug the RTL for design intent and Interface with cross-functional teams and collaboration in all verification related activities
- Mentor Junior Engineers on need basis
Requirements/Qualifications:
- Master's degree in VLSI design.
- Languages (Must) : Verilog and System Verilog.
- Methodologies (Any one) : OVM, VMM., UVM.
- EDA Tools (One of them is must): Questasim, VCS, NCSim, NCVerilog.
- Good understanding of digital design fundamentals.
- Proficient with Unix environment and common scripting languages.
- Expertise in test plan development.
- Expertise in Functional / Code Coverage activity.
- Experience in IP level verification activities.
- Hands on project experience in coverage/assertion driven verification
- Testbench development in Verilog/SystemVerilog using verification methodology
- Strong in simulation and debugging skills..
- Good knowledge of AMBA protocols like APB,AHB and AXI.
- Knowledge of revision control tools like CVS and GIT.
- Should be able to handle tasks independently.
- Good communication skills and the ability to work in a team environment.
- Experience with processor-based verification.
- Experience in UVM methodology.
Travel Time:
0% - 25%
Comments
Post a Comment