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ASIC Physical Design Engineer at HPE

  Hello Dear Readers, At HPE Bangalore, there is a vacancy for a Physical Design Engineer role. This role has been designed as ‘’Onsite’ with an expectation that you will primarily work from an HPE office. Who We Are: Hewlett Packard Enterprise is the global edge-to-cloud company advancing the way people live and work. We help companies connect, protect, analyze, and act on their data and applications wherever they live, from edge to cloud, so they can turn insights into outcomes at the speed required to thrive in today’s complex world. Our culture thrives on finding new and better ways to accelerate what’s next. We know varied backgrounds are valued and succeed here. We have the flexibility to manage our work and personal needs. We make bold moves, together, and are a force for good. If you are looking to stretch and grow your career our culture will embrace you. Open up opportunities with HPE. Job Description: Aruba  is an HPE Company, and a leading ...
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Engineer I - Verification at Microchip Bangalore

 Hello Dear Readers, 

Currently at Microchip Bangalore vacancy for Engineer I - Verification role.

Job Description:

  • Define and develop verification architecture
  • Define and develop verification methodologies
  • Define and develop verification environments
  • Write verification specifications, verification plans, and documentation
  • Generate test bench and automatic regression plans
  • Be responsible for verification architecture, simulations, verifications, and debugging of circuit and logic designs
  • Complete block-level verification and chip level verification
  • Bring a self-motivated and enthusiastic approach that will achieve any new requirements and overcome all challenges
  • Able to debug the RTL for design intent and Interface with cross-functional teams and collaboration in all verification related activities
  • Mentor Junior Engineers on need basis
 

Requirements/Qualifications:

  • Master's degree in VLSI design.
  • Languages (Must) : Verilog and System Verilog.
  • Methodologies (Any one) : OVM, VMM., UVM.
  • EDA Tools (One of them is must): Questasim, VCS, NCSim, NCVerilog.
  • Good understanding of digital design fundamentals.
  • Proficient with Unix environment and common scripting languages.
  • Expertise in test plan development. 
  • Expertise in Functional / Code Coverage activity.
  • Experience in IP level verification activities.
  • Hands on project experience in coverage/assertion driven verification 
  • Testbench development in Verilog/SystemVerilog using verification methodology
  • Strong in simulation and debugging skills..
  • Good knowledge of AMBA protocols like APB,AHB and AXI.
  • Knowledge of revision control tools like CVS and GIT.
  • Should be able to handle tasks independently.
  • Good communication skills and the ability to work in a team environment. 
  • Experience with processor-based verification.
  • Experience in UVM methodology.

Travel Time:

0% - 25%


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