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Product Engineer II at Cadence Design Systems

Hello Dear Readers, Cadence Design Systems has a vacancy for a Product Engineer II role. Cadence is a pivotal leader in electronic design, building upon more than 30 years of computational software expertise. The company applies its underlying Intelligent System Design strategy to deliver software, hardware and IP that turn design concepts into reality.  Cadence customers are the world’s most innovative companies, delivering extraordinary electronic products from chips to boards to systems for the most dynamic market applications including consumer, hyperscale computing, 5G communications, automotive, aerospace industrial and health. The Cadence Advantage: The opportunity to work on cutting-edge technology in an environment that encourages you to be creative, innovative, and to make an impact. Cadence’s employee-friendly policies focus on the physical and mental well-being of employees, career development, providing opportunities for learning, and celebrating success in recog...
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Engineer I - Verification at Microchip Bangalore

 Hello Dear Readers, 

Currently at Microchip Bangalore vacancy for Engineer I - Verification role.

Job Description:

  • Define and develop verification architecture
  • Define and develop verification methodologies
  • Define and develop verification environments
  • Write verification specifications, verification plans, and documentation
  • Generate test bench and automatic regression plans
  • Be responsible for verification architecture, simulations, verifications, and debugging of circuit and logic designs
  • Complete block-level verification and chip level verification
  • Bring a self-motivated and enthusiastic approach that will achieve any new requirements and overcome all challenges
  • Able to debug the RTL for design intent and Interface with cross-functional teams and collaboration in all verification related activities
  • Mentor Junior Engineers on need basis
 

Requirements/Qualifications:

  • Master's degree in VLSI design.
  • Languages (Must) : Verilog and System Verilog.
  • Methodologies (Any one) : OVM, VMM., UVM.
  • EDA Tools (One of them is must): Questasim, VCS, NCSim, NCVerilog.
  • Good understanding of digital design fundamentals.
  • Proficient with Unix environment and common scripting languages.
  • Expertise in test plan development. 
  • Expertise in Functional / Code Coverage activity.
  • Experience in IP level verification activities.
  • Hands on project experience in coverage/assertion driven verification 
  • Testbench development in Verilog/SystemVerilog using verification methodology
  • Strong in simulation and debugging skills..
  • Good knowledge of AMBA protocols like APB,AHB and AXI.
  • Knowledge of revision control tools like CVS and GIT.
  • Should be able to handle tasks independently.
  • Good communication skills and the ability to work in a team environment. 
  • Experience with processor-based verification.
  • Experience in UVM methodology.

Travel Time:

0% - 25%


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