Hello Dear Readers, Today in this post, I will provide some deep insight into the VLSI packaging evolution and innovations. Semiconductor packaging has evolved from a simple protective housing into a critical performance enabler. In the modern VLSI landscape, packaging is no longer an afterthought; it is a fundamental determinant of PPA (Power, Performance, and Area) metrics, often dictating the thermal limits and signal integrity of the final SoC. 1. Traditional Packaging Technologies: These methods are the workhorses of the industry, widely used for low-to-medium complexity devices where cost-efficiency is paramount. Wire Bonding (QFN, QFP, DIP): Wire bonding is the most mature interconnection technology. It uses thin gold, copper, or aluminum wires to connect the die's bond pads to the package's internal leadframe. Implementation: The die is attached face-up to a leadframe or substrate. A wire bonder uses thermocompression or ultrasonic energy to attach wires betwee...
Hello Dear Readers,
Currently at Synopsys Bangalore vacancy for Physical Design Engineer role.
At Synopsys, they are at the heart of the innovations that change the way we work and play. Self-driving cars. Artificial Intelligence. The cloud. 5G. The Internet of Things. These breakthroughs are ushering in the Era of Smart Everything. And we’re powering it all with the world’s most advanced technologies for chip design and software security. If you share our passion for innovation, we want to meet you.
Silicon IP Subsystems business is all about integrating more capabilities into an SoC—faster. We offer the world’s broadest portfolio of silicon IP—predesigned blocks of logic, memory, interfaces, analog, security, and embedded processors. All to help customers integrate more capabilities. Meet unique performance, power, and size requirements of their target applications. And get differentiated products to market quickly with reduced risk.
R&D Engineer
We are looking for a PD Engineer with an experience of 2-15 yrs with our Bangalore center.
What you'll do
As a Physical Design Engineer, you will be
- Working on benchmarks to displace competition implementation solutions
- Working with customers to develop and debug RTL-GDS implementation methodologies and flows.
- Providing technical solutions by identifying the design and/or EDA tool issues and provide appropriate solution for customers
- Effectively translate the findings into requirements for R&D to improve both tool behaviour with enhancements as adaptive long-term solutions.
- Involved in deployment of new technologies on latest EDA versions and enable customers to migrate to newer versions achieving best PPA
- Coming up with proactive understanding of customers pain point and come up with innovative solutions to address the same
- Closely interacting with Synopsys R&D team and product development team to develop future technologies
Requirements
- Candidates must have good exposure towards methodology changes to achieve targeted PPA metrics for complex designs.
- Proficiency in Synopsys implementation tools is an advantage
- The individual must be self-motivated and dedicated with strong debug skills.
- Requires proficiency in scripting (tcl / unix / perl).
- Excellent communication skills including ability to interface with customers and business unit personnel are essential
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