Skip to main content

SRAM/Memory CAD Engineer at Qualcomm

  Hello Dear Readers, Qualcomm Bangalore currently has a vacancy for an SRAM/Memory CAD Engineer. As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems,  Digital/Analog/RF/optical  systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products. Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performance requirements. Minimum Qualifications: • Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 3+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronic...

ARM Assembly Language Practice Question And Answer Part-1

 Hello Dear Readers, 

Today in this post I will provide some basics to advanced ARM's assembly language practice QA I have used the Keil tool for code writing.

Q-1). Perform subtraction of the numbers stored at memory location 0x4000 from the number stored at memory location 0x4004 and place the result in memory location 0x4008.

Code:

; Program of the substraction 

 area into, code, readonly 

entry 

 mov r1, #0x4000 

 ldr r2,[r1] 

 ldr r3,[r1, #4] 

sub r4,r3,r2 ; perform substraction operation 

str r4,[r1, #8] ; store the result at memory location 0x4008 

end

Output:


Q-2). 
Write a program to check whether the number stored at the memory location is even or odd.

Code:
; program for identity number is even or odd area prog2, code, readonly 
entry 
mov r1,#0x4000 ; data location 
ldr r2,[r1] 
tst r2,#1 ; anding with 0x01 will be updating status of flag register 
bne odd 
mov r1,r2 ; even number stored at r1 
odd mov r3,r2 ; store odd number 
end 

Output:


Q-3). Write a program to perform sum of two 64-bit numbers. Use DCD for the same.

Code:

; program of adding two 64 bit data 

area sum, code, readonly 

entry 

ldr r0,=data1 

ldr r1,[r0] 

ldr r2,[r0,#4] 

ldr r0,=data2 

ldr r3,[r0] 

ldr r4,[r0,#4] 

adds r6,r2,r4 

adc r5,r1,r3 

ldr r0,=result 

str r5,[r0]

str r6,[r0,#4] 

data1 dcd 0x4000,0x5000 

data2 dcd 0x3400,0x2000 

result dcd 0 

end

Output:


Q-4). Store a number 0xBDA35D12 at location 0x4064. Use DCD for the same.

Code:

; store given data in memory 0x4064 

area store, code, readonly 

entry 

mov r1, #0x4000 

ldr r2,=data 

ldr r3,[r2] 

str r3, [r1, #100] 

data dcd 0xBDA35D12 

end

Output:


Q-5). 
Swap the numbers stored at memory locations 0x4000 and 0x4004.

Code:

; program to swaping contents of the memory location without taking temporary register 

area swap, code, readonly 

entry 

mov r1, #0x4000 

ldr r2,[r1] 

ldr r3,[r1,#4] 

eor r2,r2,r3 

eor r3,r3,r2 

eor r2,r2,r3 

str r2,[r1] 

str r3,[r1,#4] 

stop b stop 

end

Output:


Q-6). 
Write a program to perform the below operations on 0x2020zzFF stored at location 0x4000. Perform the following operations on the number. Store result at memory location 0x4004. a. Selective-clear (on 1st byte) b. Selective-set (on 4th bit) c. Selective-complement (on 2 nd and 3rd byte) d. Selective-set (on 4th byte).

Code:

; program for the desire operation performed on the given data 

area selective, code, readonly 

entry 

mov r1, #0x4000 

ldr r2,[r1] 

and r2,r2, #0xffffff00 

orr r2,r2, #0x00000008 

mov r3,#0x0ff00000 

mov r4,#0x000f0000 

orr r3,r3,r4 

eor r2,r2,r3 

orr r2,r2, #0xff000000 

str r2,[r1, #4] 

end 

Output:




Comments

  1. Now ARM assembly language problem is also solved. Thanks for your effort.

    ReplyDelete
  2. Wow bro how many parts are you uploading ?

    ReplyDelete
  3. Nice posts and fabulous examples are there.

    ReplyDelete

Post a Comment

Popular posts from this blog

Internship - SoC /IP Design at NXP India

Hello Dear Readers, Currently, at NXP India  vacancy for  Internship - SoC /IP Design   role.   We are looking for a Master degree student with Electronics and Communication Engineering, or related field, with an emphasis on SoC design. This is a full-time internship with a duration of about 11-12 months. Job Responsibility: Working with our experienced design team to design state of the art SoC hardware specific segment applications like Automotive, IoT, voice/object recognition, security, smart connectivity and touch sensing . Assisting experienced engineers with End-to-end ownership of SoC Design, Verification and implementation (Physical Design). Design and verify digital and Mixed-signal IPs. Document designs and present results. Job Qualification: Master student in electronic/computer engineering Creative and positive mindset Good knowledge on CMOS technologies Great communication skills, interpersonal skills, teamwork skills and can-do attitude Desire for a ca...

Best Book for Designing Microarchitecture of Microprocessor Using Verilog HDL

  Hello Dear Readers, Currently, after succeeding in many topics now I starting to provide technical book reviews which were I have completed and still read books always. So let us start today's book review. Book Name:   Computer Principles and Design in Verilog  HDL Description:  Uses Verilog HDL to illustrate computer architecture and microprocessor design, allowing readers to readily simulate and adjust the operation of each design, and thus build industrially relevant skills Introduces the computer principles, computer design, and how to use Verilog HDL (Hardware Description Language) to implement the design Provides the skills for designing processor/arithmetic/cpu chips, including the unique application of Verilog HDL material for CPU (central processing unit) implementation Despite the many books on Verilog and computer architecture and microprocessor design, few, if any, use Verilog as a key tool in helping a student to understand these design techniques...

Exploring the Role of LEF Files in VLSI Chip Design: A Beginner's Guide

Hello Dear Readers,   Today in this post, I will provide some deep insight into the LEF file role during the VLSI Chip Design process. In VLSI (Very Large Scale Integration) design, a LEF file is a file that contains information about the physical geometry of the standard cells used in a circuit. LEF stands for Library Exchange Format. A standard cell is a pre-designed logic cell that contains a specific function, such as a flip-flop or an AND gate. Standard cells are designed to be easily combinable and scalable to create more complex circuits. The physical geometry of each standard cell is defined in the LEF file. The LEF file contains information such as the width, height, and position of the pins and metal layers of each standard cell. It also contains information about the physical design rules that govern the placement of these cells on the chip. LEF files are important in VLSI design because they enable the interoperability of different design tools from different vend...