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Physical Design Methodology Engineer at Texas Instruments

  Hello Dear Readers, Texas Instruments Bangalore has a vacancy for the Physical Design Engineer role. We need an Physical Design Methodology Engineer to join our ATD team. The candidate should have a strong background in back-end design of ASIC/SoC chips. The ideal candidate will have a bachelor’s or master’s degree in Electrical Engineering or a related field. Requirements: 1 - 2 Years of experience in physical design Bachelor’s or master’s degree in Electrical/Electronics Engineering or a related field Strong understanding of physical design principles Must know the basics of floorplan, placement, CTS, routing, ECO, Physical Verification Proficiency in back-end design tools, such as Cadence Genus/Innovus/Tempus/Voltus Excellent problem-solving skills and attention to detail Effective communication and collaboration skills Responsibilities: Synthesis to GDSII Perform full Physical design flow and its verification Work closely with Digital Design and DFT engineers Ensure...

Physical Design Methodology Engineer at Texas Instruments

 Hello Dear Readers,

Texas Instruments Bangalore has a vacancy for the Physical Design Engineer role.

We need an Physical Design Methodology Engineer to join our ATD team. The candidate should have a strong background in back-end design of ASIC/SoC chips. The ideal candidate will have a bachelor’s or master’s degree in Electrical Engineering or a related field.


Requirements:

  • 1 - 2 Years of experience in physical design
  • Bachelor’s or master’s degree in Electrical/Electronics Engineering or a related field
  • Strong understanding of physical design principles
  • Must know the basics of floorplan, placement, CTS, routing, ECO, Physical Verification
  • Proficiency in back-end design tools, such as Cadence Genus/Innovus/Tempus/Voltus
  • Excellent problem-solving skills and attention to detail
  • Effective communication and collaboration skills

Responsibilities:

  • Synthesis to GDSII
  • Perform full Physical design flow and its verification
  • Work closely with Digital Design and DFT engineers
  • Ensure Design meets PPA targets
  • Develop as much automation as possible to debug and faster work



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