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Physical Design Methodology Engineer at Texas Instruments

  Hello Dear Readers, Texas Instruments Bangalore has a vacancy for the Physical Design Engineer role. We need an Physical Design Methodology Engineer to join our ATD team. The candidate should have a strong background in back-end design of ASIC/SoC chips. The ideal candidate will have a bachelor’s or master’s degree in Electrical Engineering or a related field. Requirements: 1 - 2 Years of experience in physical design Bachelor’s or master’s degree in Electrical/Electronics Engineering or a related field Strong understanding of physical design principles Must know the basics of floorplan, placement, CTS, routing, ECO, Physical Verification Proficiency in back-end design tools, such as Cadence Genus/Innovus/Tempus/Voltus Excellent problem-solving skills and attention to detail Effective communication and collaboration skills Responsibilities: Synthesis to GDSII Perform full Physical design flow and its verification Work closely with Digital Design and DFT engineers Ensure...
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Application Engineer (STA) at Ausdia Inc.

 Hello Dear Readers, 

Currently, at Ausdia Inc, there is a vacancy for Application Engineer (STA) role.

Ausdia is a fast-paced, growing EDA company that is the leader in timing constraints generation, verification, management and CDC analysis.



Take your Career to the next level:

  • We work at the forefront of technology development and this role provides you with the opportunity to work on both our new and existing products and interact with our customers.
  • The role requires strong technical expertise to debug customer issues. It is a great opportunity to work closely with one of the best Field and R&D teams in the EDA industry.
  • In this dynamic role, the chosen candidate will get to work with multiple customers and gain broad exposure across the semiconductor industry.
  • As an EDA product company, we provide competitive salaries and solid work life balance.

Qualifications:

  • Around 2 years of work experience in STA or PD. Strong understanding of timing constraints.
  • Solid understanding of STA concepts. Knowledge of the Back end design flow.
  • Experience with building timing models for hierarchical designs. Knowledge about STA for hierarchical designs.
  • Very good TCL scripting skills. (Perl/Python is a big plus)
  • EDA work experience is a big positive.
  • Understanding of software development and testing. Familiarity with Git, Jira and Confluence.
  • Strong critical thinking skills and ability to think outside the box.
  • Strong verbal and written communication skills.



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