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Product Engineer II at Cadence Design Systems

Hello Dear Readers, Cadence Design Systems has a vacancy for a Product Engineer II role. Cadence is a pivotal leader in electronic design, building upon more than 30 years of computational software expertise. The company applies its underlying Intelligent System Design strategy to deliver software, hardware and IP that turn design concepts into reality.  Cadence customers are the world’s most innovative companies, delivering extraordinary electronic products from chips to boards to systems for the most dynamic market applications including consumer, hyperscale computing, 5G communications, automotive, aerospace industrial and health. The Cadence Advantage: The opportunity to work on cutting-edge technology in an environment that encourages you to be creative, innovative, and to make an impact. Cadence’s employee-friendly policies focus on the physical and mental well-being of employees, career development, providing opportunities for learning, and celebrating success in recog...
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Engineer - DV at SiFive

Hello Dear Readers, 

Currently at SiFive vacancy for ASIC Verification Engineer role.

As the pioneers who introduced RISC-V to the world, SiFive is transforming the future of compute by bringing the limitless potential of RISC-V to the highest performance and most data-intensive applications in the world. SiFive’s unrivaled compute platforms are continuing to enable leading technology companies around the world to innovate, optimize and deliver the most advanced solutions of tomorrow across every market segment of chip design, including artificial intelligence, machine learning, automotive, data center, mobile, and consumer. With SiFive, the future of RISC-V has no limits.


Job Description:

 

Requirement:

  • ​1-4 years of experience in DV preferably in CPU verification.
  • Proficiency in System Verilog and UVM methodology.
  • Very good object oriented programming skills.
  • Any CPU architecture knowledge (x86, ARM or RISC-V) with test-writing/test plan implementation experience.
  • Any scripting knowledge, preferably python.

Preferred skills:

  • Bus interface knowledge like AXI or PCIE
  • Integration experience with third party VIPs like bus VIPs.
  • CPU micro-arch knowledge.
  • Hands on system Verilog /UVM development work for modern high-performance CPU
  • verification.
  • Work will involve writing test cases, using test generators to generate targeted tests for RISCV CPU verification
  • Working with internal test generators to target coverage/test-plan scenarios.





Comments

  1. Anonymous29 June 2024 at 20:54

    Good opportunities for verification domain

    ReplyDelete
  2. Anonymous7 July 2024 at 02:42

    I got a call any idea about interview

    ReplyDelete

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