Low Power Design: Common Power Format

Hello Dear Readers, 

Today in this post, I will provide some deep insight into Low Power Design: Common Power Format syntax and how to implement it.

• CPF (Common Power Format)
• CPF is power intent as similar as UPF which we have seen earlier. 
• CPF structure is like UPF, only difference is UPF is handled by Synopsys VC static/dynamic tool, whereas CPF is handled only by Cadence’s CLP tool.

• Below is Low Power flow for CPF: 

CPF Implementation Flow

• Commands of CPF and UPF are much more similar only difference is in few syntax, will try to write CPF for below design block:

• Commands of CPF and UPF are much more similar only difference is in few syntax, let’s have glance of CPF commands below:

#Definition of top domain

set_design top

#Define the top power domain

create_power_domain –name pdTOP –default

#Define pdA

     create_power_domain -name pdA \

                                          -instances {uA uC} \

                                          -shoutoff_condition {!uPCM/pso[0]}

#Define PSO- pdB when pso is low

     create_power_domain  -name pdB \

                                           -instances {uB } \

                                           -shoutoff_condition {!uPCM/pso[1]}

• Design with multiple power domain and have power shutoff condition along with isolation cell definition. All outputs of pdB isolated high on rising edge of uPCM/iso  

     set highpin { uB/en1 uB/en2 }

     create_isolation_rule -name ir1 \

                                        -from pdB \

                                       -isolation_condition {uPCM/iso} 

                                        -isolation_output high \

                                        -pins “$highpin”

• Design with multiple power domain, let’s have look at Level sifters:

#Level shifter definition:

 create_level_shifter_rule –name lsr1 -to {pdB} -from {pdA}

 create_level_shifter_rule –name lsr2 -to {pdA} -from {pdB}

 create_level_shifter_rule –name lsr3 -to {pdtop} -from {pdB}

 create_level_shifter_rule –name lsr4 -to {pdA} -from {pdtop}

• Retention strategy definition in CPF:

 #retention strategy rule:

 #Defined state retention strategy: state stored on falling edge of restore[0] and restored           rising edge.

 #Note: if –save is not specified, it is logical NOT of the –restore signal       vice-versa 

 

 set srpgList {uB/reg1 uB/reg2}

 create_state_retention_rule -name sr1\

                                              -restore_edge {uPCM/restore[1]}     

• Power modes definition in CPF: 

#Top is always high, pdA/pdB can be medium or low.

create_nominal_condition –name high –voltage 1.2

create_nominal_condition –name medium –voltage 1.0

create_nominal_condition –name low –voltage 0.8

create_nominal_condition –name off –voltage 0

#Define the modes:

 create_power_mode  -name PM1 \

                                   -domain_condition {pdTOP@high pdA@medium pdB@medium}

 create_power_mode -name PM2 \

                                   -domain_condition {pdTOP@high pdA@low pdB@low}

 create_power_mode -name PM3 \

                                  -domain_condition {pdTOP@high pdA@low pdB@off}

  end_design

• Power shut off sequence:

• Power up sequence:

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