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VLSI Packaging Evolution and Innovations

Hello Dear Readers,   Today in this post, I will provide some deep insight into the VLSI packaging evolution and innovations. Semiconductor packaging has evolved from a simple protective housing into a critical performance enabler. In the modern VLSI landscape, packaging is no longer an afterthought; it is a fundamental determinant of PPA (Power, Performance, and Area) metrics, often dictating the thermal limits and signal integrity of the final SoC. 1. Traditional Packaging Technologies: These methods are the workhorses of the industry, widely used for low-to-medium complexity devices where cost-efficiency is paramount. Wire Bonding (QFN, QFP, DIP): Wire bonding is the most mature interconnection technology. It uses thin gold, copper, or aluminum wires to connect the die's bond pads to the package's internal leadframe. Implementation: The die is attached face-up to a leadframe or substrate. A wire bonder uses thermocompression or ultrasonic energy to attach wires betwee...
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IC Physical Design (PnR) at Ulkasemi

Hello Dear Readers, 

Ulkasemi has a vacancy for an IC Physical Design (PnR) role.

Job Overview:
As a full-time Trainee Engineer, the individual will be working on IC Physical Design implementation from RTL to GDSII to create design databases ready for manufacturing with a special focus on power, performance & area optimization with next-generation state-of-the-art process technologies.

Job Responsibilities:

  • Perform physical design implementation which includes Floor planning, Power Planning, Clock Tree Synthesis, Place and Route, ECO, Logic Equivalence checks
  • Timing analysis, physical & electrical verification, driving the sign-off closure meeting schedule, and design goals
  • Develop flow, methodologies, and automation scripts for various implementation steps
  • Follow the instructions, compile documents, prepare deliverables, and report to the team lead
  • Should remain up to date with the latest technology trends

Educational Qualification:
  •  B.Sc/M.Sc in EEE or equivalent degree with an emphasis on VLSI design from any reputed university
  • Willing to stay at least 3 years and build a career in VLSI industry
  • Applicants are expected to complete Digital Devices and Electronics and VLSI Design
  • Knowledge in Physical Design (PnR) or back-end ASIC/SoC design flow will be a plus
  • Familiar with Linux and scripting languages like Perl, Python, TCL/Tk, and Shell is a plus
  • Should be able to multitask and work under pressure
  • Should be able to work as a part of teams across multiple locations and time zones
  • Good analytical and debugging capabilities are a must
  • Good communication skills, both oral and written
Experience:
  • Freshers are preferred (1-2 years of relevant experience are also encouraged to apply)

 

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