Hello Dear Readers, Cadence Design Systems has a vacancy for a Product Engineer II role. Cadence is a pivotal leader in electronic design, building upon more than 30 years of computational software expertise. The company applies its underlying Intelligent System Design strategy to deliver software, hardware and IP that turn design concepts into reality. Cadence customers are the world’s most innovative companies, delivering extraordinary electronic products from chips to boards to systems for the most dynamic market applications including consumer, hyperscale computing, 5G communications, automotive, aerospace industrial and health. The Cadence Advantage: The opportunity to work on cutting-edge technology in an environment that encourages you to be creative, innovative, and to make an impact. Cadence’s employee-friendly policies focus on the physical and mental well-being of employees, career development, providing opportunities for learning, and celebrating success in recog...
Hello Dear Readers,
Currently, at Cognitive Design Technology Pvt Ltd vacancy for a Std cell Circuit Design & Characterization role.
Specific Responsibilities:
- Investigate, plan, and design and productize novel sub-threshold and near-threshold circuits and other related low power circuit techniques (e.g., adaptive body biasing, adaptive clock distributions, level shifters, customized standard cells, specialized memory structures, PDN modeling etc.).
- Validate and refine low power circuit design techniques as part of a team that is building standard cells in advanced nodes (e.g., 12nm and beyond).
- Work with product development teams (library characterization, Engineering, Architecture and Product Planning team) to rapidly deploy newly developed custom circuits and standard cells in products.
- Develop and drive standard cell development activities for test and production chips owned by the Advanced Development team.
- Maintain a relationship and collaborate with 3rd party CAD tool vendors and foundries during the development of new circuit design methodologies.
Requirement :
- Proficiency in industry-standard EDA tools for transistor-level and circuit-level simulations, such as Cadence or Synopsys and Cadence Virtuoso Liberate/LV/Mx/Trio
- Solid understanding of FinFET technology and its impact on standard cell library design and characterization.
- Familiarity with circuit and layout design, static timing analysis (STA) and power analysis methodologies.
- Strong analytical skills and attention to detail for data analysis and problem-solving.
- Advanced process nodes (e.g., 16nm, 12nm, 6nm or below) is highly desirable.
- Effective communication and teamwork skills to collaborate with cross-functional teams and present findings and recommendations.
- Exceptional candidates with a Master’s degree will be considered.
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