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Engineer I at SiFive

Hello Dear Readers,   Currently at SiFive vacancy for Engineer I role . As the pioneers who introduced RISC-V to the world, SiFive is transforming the future of compute by bringing the limitless potential of RISC-V to the highest performance and most data-intensive applications in the world. SiFive’s unrivaled compute platforms are continuing to enable leading technology companies around the world to innovate, optimize and deliver the most advanced solutions of tomorrow across every market segment of chip design, including artificial intelligence, machine learning, automotive, data center, mobile, and consumer. With SiFive, the future of RISC-V has no limits. Job Description:   Responsibilities: Engage in the logic design and verification of digital IPs, CPUs, peripherals, and sub-systems across various VLSI domains. Create and implement innovative designs and testbenches that are highly scalable, configurable, and efficient. Strong hands-on experience with UVM testbench devel...
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Design Verification Engineer at Micron Technology

 Hello Dear Readers, 

Currently, at Micron Technology vacancy for Design Verification Engineer role.

Join an inclusive team passionate about one thing: using their expertise in the relentless pursuit of innovation for customers and partners. The solutions we build help make everything from virtual reality experiences to breakthroughs in neural networks possible. We do it all while committing to integrity, sustainability, and giving back to our communities. Because doing so can fuel the very innovation we are pursuing.

Responsibilities will include, but are not limited to:

  • Provide verification support to design projects by simulating, analyzing, and debugging pre-silicon block level/full chip designs. Develop Test cases/Stimulus to increase the functional coverage for all DRAM and emerging memory architectures and features.

  • Develop and maintain test benches and test vectors using simulation tools and run regressions for coverage analysis and improvements. Co-work with international colleagues on developing new verification flows to take on the challenges in DRAM and emerging memory design. Participate in developing verification methodology and verification environments for advanced DRAM and emerging memory products.

  • Good understanding of digital / mixed-signal circuits and experience in Digital /Mixed signal Verification. Understand the usage of tools like Virtuoso, Xcellium, Simvision, vsim, Waveview, Finseim, Hspice.

  • Hands-on experience in writing Verilog, Real Number Models is a plus.

  • Hands-on experience in building SV test benches at Block and Fullchip Levels.

  • Hands-on experience in SV, UVM-based Verification. Good scripting skills using perl, python is a plus.

  • Previous work experience in DRAM memory related fields is a plus. Must possess good communication, debugging skills and ability to work well in a team.


                              Apply Here
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