Hello Dear Readers, Texas Instruments Bangalore has a vacancy for the Physical Design Engineer role. We need an Physical Design Methodology Engineer to join our ATD team. The candidate should have a strong background in back-end design of ASIC/SoC chips. The ideal candidate will have a bachelor’s or master’s degree in Electrical Engineering or a related field. Requirements: 1 - 2 Years of experience in physical design Bachelor’s or master’s degree in Electrical/Electronics Engineering or a related field Strong understanding of physical design principles Must know the basics of floorplan, placement, CTS, routing, ECO, Physical Verification Proficiency in back-end design tools, such as Cadence Genus/Innovus/Tempus/Voltus Excellent problem-solving skills and attention to detail Effective communication and collaboration skills Responsibilities: Synthesis to GDSII Perform full Physical design flow and its verification Work closely with Digital Design and DFT engineers Ensure...
Hello Dear Readers, Today in this post I will provide some basics to advanced ARM's assembly language practice QA I have used the Keil tool for code writing. Q-1). Perform subtraction of the numbers stored at memory location 0x4000 from the number stored at memory location 0x4004 and place the result in memory location 0x4008. Code: ; Program of the substraction area into, code, readonly entry mov r1, #0x4000 ldr r2,[r1] ldr r3,[r1, #4] sub r4,r3,r2 ; perform substraction operation str r4,[r1, #8] ; store the result at memory location 0x4008 end Output: Q-2). Write a program to check whether the number stored at the memory location is even or odd. Code: ; program for identity number is even or odd area prog2, code, readonly entry mov r1,#0x4000 ; data location ldr r2,[r1] tst r2,#1 ; anding with 0x01 will be updating status of flag register bne odd mov...