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RTL Design Engineer at Skyroot Aerospace

Hello, Dear Readers, Skyroot Aerospace has a vacancy for the RTL Design Engineer role. About Skyroot Aerospace: A cutting-edge startup founded by ex-ISRO scientists. Dedicated to affordable space access, we're rewriting aerospace technology rules. Our dynamic team fosters inventiveness, collaboration, and relentless excellence. Join us on a transformative journey to redefine space possibilities. Welcome to the forefront of space innovation with Skyroot Aerospace! Purpose of role: Understand architectural requirements and Design micro-architecture, implement design blocks using VHDL/Verilog for FPGA based Avionics packages for orbital launch vehicles and ground infrastructure. Job Requirements: 2+ Years of RTL and system design experience. Strong knowledge on Digital System Design (DSD). Strong knowledge of RTL/SoC design/integration with VHDL/Verilog. Strong knowledge in problem solving and debugging skills. Ability to understand architectural requirements and Design micro-archite...
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Physical Design Engineer at Baya Systems

Hello Dear Readers, 

Currently, at Baya Systems, there is a vacancy for a Physical Design Engineer role.

About the role: We are seeking a seasoned Physical Design Engineer with a strong background in all aspects of Physical Design and Implementation flows. The ideal candidate will play a key role in shaping our technology portfolio, bringing expertise and creativity to our solutions

Responsibilities:

  • Own RTL to GDS physical implementation flows for synthesis, floor-planning, place and route, clock tree synthesis, timing & power closure, EM/IR, PDV and final PD sign off
  • Own physical design & implementation of high-performance designs from block level to system level components
  • Deep collaboration with Micro-architects to explore performance, power and area trade-offs for high performance and low power designs
  • Physical implementation feasibility studies and design recommendations for best PPA
  • Develop methodologies and recipes for various stages of physical implementation
  • Perform various physical design validation (PDV) flows for Timing, Power, EM/IR, etc. to ensure physical design quality
  • Perform design rule checking (DRC), (LVS) checks, and other physical verification tasks

Qualifications:

  • BS, MS in Electrical Engineering or Computer Engineering or related degree
  • Experience in all aspects of physical design including synthesis, floor planning, place & route, timing & power closure, EM/IR, physical design validation, etc
  • Experience with synthesis, place & route, static timing analysis and PDV tools
  • Experience in implementing clock trees and power grids
  • Experience with scripting for physical design flow automation
  • Experience with Synopsys Design Compiler, Prime Time, ICC, Fusion Compiler etc.
  • Good knowledge of high-performance and low-power microarchitecture and logic design principles
  • Understanding of modern (sub 7nm) sub-micron technology nodes and device physics
  • Basic knowledge of System/SoC Architecture and System Verilog RTL coding
  • Strong communication and collaboration skills

 

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