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Physical Design Methodology Engineer at Texas Instruments

  Hello Dear Readers, Texas Instruments Bangalore has a vacancy for the Physical Design Engineer role. We need an Physical Design Methodology Engineer to join our ATD team. The candidate should have a strong background in back-end design of ASIC/SoC chips. The ideal candidate will have a bachelor’s or master’s degree in Electrical Engineering or a related field. Requirements: 1 - 2 Years of experience in physical design Bachelor’s or master’s degree in Electrical/Electronics Engineering or a related field Strong understanding of physical design principles Must know the basics of floorplan, placement, CTS, routing, ECO, Physical Verification Proficiency in back-end design tools, such as Cadence Genus/Innovus/Tempus/Voltus Excellent problem-solving skills and attention to detail Effective communication and collaboration skills Responsibilities: Synthesis to GDSII Perform full Physical design flow and its verification Work closely with Digital Design and DFT engineers Ensure...
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Sr Solutions Engineer – AE (Pegasus DRC/LVS runsets) at Cadence Design Systems

Hello Dear Readers,

Cadence Design Systems has a vacancy for a Senior Solutions Engineer-AE (Pegasus DRC/LVS sunsets) role.

Cadence is a pivotal leader in electronic design, building upon more than 30 years of computational software expertise. The company applies its underlying Intelligent System Design strategy to deliver software, hardware and IP that turn design concepts into reality.  Cadence customers are the world’s most innovative companies, delivering extraordinary electronic products from chips to boards to systems for the most dynamic market applications including consumer, hyperscale computing, 5G communications, automotive, aerospace industrial and health.

The Cadence Advantage:

  • The opportunity to work on cutting-edge technology in an environment that encourages you to be creative, innovative, and to make an impact.
  • Cadence’s employee-friendly policies focus on the physical and mental well-being of employees, career development, providing opportunities for learning, and celebrating success in recognition of specific needs of the employees.
  • The unique “One Cadence – One Team” culture promotes collaboration within and across teams to ensure customer success.
  • Multiple avenues of learning and development available for employees to explore as per their specific requirement and interests.
  • You get to work with a diverse team of passionate, dedicated, and talented individuals who go above and beyond for our customers, our communities, and each other—every day.

Job Description:

  • We are looking for candidate who can code Pegasus DRC/LVS runsets based on given design rules document or given spec from customers or foundry partners. Develop automation to run regressions, auto detect issues and generate validation reports
  • You are also expected to file bug reports and work closely with R&D team.
  • Support customers on tool bugs, developments/improvements to enhance performance, add functionality and improve capacity.

Qualifications:

  • BS degree with 2+ years of experience or MS degree with 1+ years of experience in electrical engineering, computer science or equivalent.

Experience and Technical Skills required:

  • Experience in Developing Calibre/ICV/Assura/Pegasus runsets (DRC, LVS, Antenna) and validating testcases.
  • Experience in DRC/LVS debugging for advanced nodes.
  • Fluent in atleast one of the following : TCL, Python, Unix-Linux platforms

Behavioral skills required:

  • Must possess strong written, verbal and presentation skills.
  • Ability to establish a close working relationship with peers and management.
  • Explore what’s possible to get the job done, including creative use of unconventional solutions.
  • Work effectively across functions and geographies
  • Push to raise the bar while always operating with integrity.




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