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Physical Design/PDK methodology Engineer

Hello Dear Readers, At Applied Materials Bangalore, there is a vacancy for a Physical Design/PDK methodology Engineer role. Applied Materials is a global leader in materials engineering solutions used to produce virtually every new chip and advanced display in the world. We design, build and service cutting-edge equipment that helps our customers manufacture display and semiconductor chips – the brains of devices we use every day. As the foundation of the global electronics industry, Applied enables the exciting technologies that literally connect our world – like AI and IoT. If you want to push the boundaries of materials science and engineering to create next generation technology, join us to deliver material innovation that changes the world.  Key Responsibility: Expertise in PDK enablement and library  validation/automation. Hands-on experience with LVS/Parasitic extraction/standard cell characterization flows and methodologies Design/System level experience with DTCO and ...
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Product Engineer - STA at Siemens India

Hello Dear Readers,

Currently, at Siemens EDA (Siemens Digital Industries Software) vacancy for Product Engineer - STA role.

This is your role:

  • Working on 7nm and 5nm designs with various customers for deployment of Aprisa place and route tools.
  • Are you expertised in solving customer's problems for critical designs to achieve desired performance, area and power targets!
  • Responsible to develop flow and methodology for doing placement, CTS and routing. Also, provide training and technical support to customers using Aprisa tools

We don’t need superheroes, just superminds!

  • We are looking for someone with hands on experience in Physical Design (floorplan, placement, CTS and routing) and timing closure of complex blocks and/or Full Chip designs.
  • Hands-on experience with commercial place & route tools like Synopsys-lCC2, Cadence-Innovus or Aprisa is a must.
  • Tapeout experience of 2 or more projects is a must.
  • Do you have good understanding of timing, power and area trade-offs?
  • Ability to pickup new flows, learn on the job and influence QOR is a must.
  • We are looking for an experienced design delivering with multiple voltage islands and top-level floor-planning & chip-assembly is a plus.
  • Strong verbal and written communication skills; good presentation skills; good problem solving and debugging skills.

Education:

  • BE/B.Tech in Electronics and Communication (E&C) or Electrical or Telecom Engineering
  • ME/M.Tech in VLSI or Microelectronics is a plus


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