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RTL Design Engineer at Skyroot Aerospace

Hello, Dear Readers, Skyroot Aerospace has a vacancy for the RTL Design Engineer role. About Skyroot Aerospace: A cutting-edge startup founded by ex-ISRO scientists. Dedicated to affordable space access, we're rewriting aerospace technology rules. Our dynamic team fosters inventiveness, collaboration, and relentless excellence. Join us on a transformative journey to redefine space possibilities. Welcome to the forefront of space innovation with Skyroot Aerospace! Purpose of role: Understand architectural requirements and Design micro-architecture, implement design blocks using VHDL/Verilog for FPGA based Avionics packages for orbital launch vehicles and ground infrastructure. Job Requirements: 2+ Years of RTL and system design experience. Strong knowledge on Digital System Design (DSD). Strong knowledge of RTL/SoC design/integration with VHDL/Verilog. Strong knowledge in problem solving and debugging skills. Ability to understand architectural requirements and Design micro-archite...
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Engineer I-CAD at Silicon Labs

  Hello Dear Readers,

Currently, at Silicon Labs Hyderabad vacancy for Engineer I-CAD role. 

As a senior member of our CAD team, you will determine, develop and support infrastructure needs and design flows for our rapidly growing IoT product division. This is a high visibility role, which requires fluid interaction with Silicon Labs’ CAD, DevOps, IT, IP, PDK, PV and Design teams. The candidate should have an excellent grasp of design data management practices, EDA tools, LSF, and diverse processes & platforms for deep submicron design and compute environments for chip design for modern hardware systems. Proven experience working on design and compute environments will be greatly preferred for this role.

Proven experience working across a range of process nodes from smaller geometries (22nm and below) to high voltage processes (0.5u) is critical for the role.

Key Qualifications:

  • Ideal candidate should have 3+ years of experience in chip design CAD with exposure to EDA tools from multiple vendors like Mentor, Cadence and Synopsys
  • Strong programming skills in Python is a must for this role
  • Programming experience in Perl, Tcl and Shell scripting experience would be desirable
  • Sound knowledge of design flow from RTL to GDS
  • Experience in using and administering FlexLM, IBM LSF
  • Knowledge of  advanced usage of data management and version control tools like Perforce, Subversion, Cliosoft SOS, Methodics IPLM
  • Knowledge of  EDA tool installation, access control mechanisms in multi-site Linux-based Secure Design Environments
  • Experience with Cadence Virtuoso tools, Mentor Calibre will be definite plus
  • Ability to work independently, drive decision-making, strong communication, and documentation skills are critical
  • Familiarity with Analog and Digital design engineering concepts
  • Excellent documentation and communication skills. Familiarity with Jira and Confluence is a plus



 

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