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YAML in Semiconductor EDA: From Configuration Language to Reusable Design-Flow Methodology

Hello Dear Readers,   Today in this post, I will provide some deep insight about yaml langauge for CAD flow developments with detailed examples. YAML is not a programming language in the same sense as Python, Tcl, C++, or Verilog. It is primarily a human-readable data serialization/configuration language . In semiconductor EDA, that distinction is important because YAML generally describes what a flow should do , while Python/Tcl/Shell and the EDA tools execute the flow . The official YAML specification describes it as a data serialization language designed to be human-friendly and portable across programming languages. For the semiconductor angle, this becomes particularly interesting because YAML can act as a configuration layer between design methodology and EDA implementation . Frameworks such as Hammer explicitly use YAML/JSON configuration and an intermediate representation to standardize information exchanged between design, technology, and tool plugins. 1. Introduction M...
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Fresher, ASIC Verification at Kinara Inc.

Hello Dear Readers, 

Currently at Kinara Inc. vacancy for Fresher, ASIC Verification role.

Overview:

They are seeking a talented junior ASIC Verification Engineer to join our dynamic team. The successful candidate will be responsible for leading and executing verification efforts for complex ASIC designs, ensuring the quality and reliability of our products.

Key Responsibilities:

  1. Develop and maintain verification plans, testbenches, and test cases for ASIC designs.
  2. Design and implement SystemVerilog/UVM-based verification environments.
  3. Create and execute test cases to verify functionality, performance, and compliance with specifications.
  4. Write testplans, testcases at unit or SOC level.

Necessary Qualifications:

  1. Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, or related field.
  2. Expertise in SystemVerilog, C, C++ languages.
  3. Experience with verification tools such as VCS, QuestaSim, or similar is helpful.
  4. Excellent problem-solving and debugging skills.
  5. Strong communication and teamwork abilities.

Preferred Qualifications:

  1. Experience with scripting languages such as Python or Perl .
  2. Programming languages such as C,C++.
  3. Knowledge of industry standards and protocols (e.g., AXI, AHB, etc).
  4. Familiarity with formal verification techniques.

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