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Product Engineer II at Cadence Design Systems

Hello Dear Readers, Cadence Design Systems has a vacancy for a Product Engineer II role. Cadence is a pivotal leader in electronic design, building upon more than 30 years of computational software expertise. The company applies its underlying Intelligent System Design strategy to deliver software, hardware and IP that turn design concepts into reality.  Cadence customers are the world’s most innovative companies, delivering extraordinary electronic products from chips to boards to systems for the most dynamic market applications including consumer, hyperscale computing, 5G communications, automotive, aerospace industrial and health. The Cadence Advantage: The opportunity to work on cutting-edge technology in an environment that encourages you to be creative, innovative, and to make an impact. Cadence’s employee-friendly policies focus on the physical and mental well-being of employees, career development, providing opportunities for learning, and celebrating success in recog...
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Apprenticeship CAI at MediaTek Bangalore

Hello Dear Readers, 

Currently at MediaTek Bangalore vacancy for an Apprenticeship CAI role.

Job Description:
  • B.Tech degree in Electrical/Electronics Engineering with a strong educational background in Digital circuit design
  • Experience in physical design of high performance design with frequencies > 2 Ghz.
  • Experienced in hierarchical design, budgeting, multiple voltage domains and multiple clock domains.
  • Strong skills with Cadence Encounter.
  • Solid understanding of STA and timing constraints.
  • Experienced in working on advanced process nodes (16nm).
  • Strong expertise in Physical Verification to debug LVS/DRC issues at the block level.

Requirement:
  • B.Tech degree in Electrical/Electronics Engineering with strong educational background in Digital circuit design
  • Experience in physical design of high performance design with frequencies > 2 Ghz.
  • Experienced in hierarchical design, budgeting, multiple voltage domains and multiple clock domains.
  • Strong skills with Cadence Encounter.
  • Solid understanding of STA and timing constraints.
  • Experienced in working on advanced process nodes (16nm).
  • Strong expertise in Physical Verification to debug LVS/DRC issues at block level.  

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