Skip to main content

RTL Design Engineer at Skyroot Aerospace

Hello, Dear Readers, Skyroot Aerospace has a vacancy for the RTL Design Engineer role. About Skyroot Aerospace: A cutting-edge startup founded by ex-ISRO scientists. Dedicated to affordable space access, we're rewriting aerospace technology rules. Our dynamic team fosters inventiveness, collaboration, and relentless excellence. Join us on a transformative journey to redefine space possibilities. Welcome to the forefront of space innovation with Skyroot Aerospace! Purpose of role: Understand architectural requirements and Design micro-architecture, implement design blocks using VHDL/Verilog for FPGA based Avionics packages for orbital launch vehicles and ground infrastructure. Job Requirements: 2+ Years of RTL and system design experience. Strong knowledge on Digital System Design (DSD). Strong knowledge of RTL/SoC design/integration with VHDL/Verilog. Strong knowledge in problem solving and debugging skills. Ability to understand architectural requirements and Design micro-archite...

FPGA Engineer at Lenovo Inc

Hello Dear Readers,

Currently, at Lenovo Inc. vacancy for an FPGA Engineer role.

Lenovo is a US$62 billion revenue global technology powerhouse, ranked #171 in the Fortune Global 500, employing 77,000 people around the world, and serving millions of customers every day in 180 markets. Focused on a bold vision to deliver smarter technology for all, Lenovo has built on its success as the world’s largest PC company by further expanding into growth areas that fuel the advancement of ‘New IT’ technologies (client, edge, cloud, network, and intelligence) including server, storage, mobile, software, solutions, and services.

The role is an FPGA Engineer position in the Lenovo Datacenter Product Group (DCG), based out of Bangalore, Karnataka. This is an exciting role in the Server Development organization that has a strong focus on being the #1 trusted IT Partner in the data center. Opportunities on the team include developing innovative and complex server designs to meet customer and business needs.  These organic designs provide exposure to the latest technologies from Lenovo and its development partners to meet market demands.  The role also offers solving unique client challenges through the custom development of solutions and direct engagement with customers.  This candidate will become an active member of the development team that is highly motivated to engage, understand and solve the technical challenges of today and shape the server designs of tomorrow.


Required skills:

  1.  Bachelor's Degree in Electronics /Computer Engineering.
  2. 2+ years of experience in x86 architecture and hardware design.  Server design experience is preferred.
  3. 2+ year of experience in EDA schematic design tools for PCB schematic creation and the support of Physical design activity
  4. Experience in VHDL or Verilog programming and setting up test benches for verification of FPGA logic.
  5. Responsibilities or server system FPGA/CPLD development, verification, and maintenance 
  6. Maintain relevant design documents.
  7. Work closely with the worldwide hardware and firmware team for issue analysis.  
  8. Experience in simulation of FPGA logic  ModelSIM being the preferred tool currently in use.  
  9. Ability to triage and resolve medium to complex issues as well as experience in defining and performing low-level hardware validation.
  10. Strong teamwork experience to co-develop server subsystems with a team of highly motivated engineers.
  11. Strong written and verbal communication skills for a variety of tasks, including customer engagements, defect investigation, and executive updates.

Preferred skills:

  1. 4+ years of experience in x86 architecture and hardware design.  Server design experience is preferred.
  2. Experience in embedded controllers (ex. PSOC, microcontroller), including schematic design and programming logic.
  3. Proficiency in Linux/Windows Operating systems. Experience with OS virtualization is a plus.
  4. Strong proficiency in shell scripting (BASH/Perl/Python and Windows Power Shell) preferred.
  5. Collaborate on projects across fast-paced global teams.
  6. Provide executive updates in both written and presentation formats.

   

Apply Here

Comments

Popular posts from this blog

Exploring the Role of LEF Files in VLSI Chip Design: A Beginner's Guide

Hello Dear Readers,   Today in this post, I will provide some deep insight into the LEF file role during the VLSI Chip Design process. In VLSI (Very Large Scale Integration) design, a LEF file is a file that contains information about the physical geometry of the standard cells used in a circuit. LEF stands for Library Exchange Format. A standard cell is a pre-designed logic cell that contains a specific function, such as a flip-flop or an AND gate. Standard cells are designed to be easily combinable and scalable to create more complex circuits. The physical geometry of each standard cell is defined in the LEF file. The LEF file contains information such as the width, height, and position of the pins and metal layers of each standard cell. It also contains information about the physical design rules that govern the placement of these cells on the chip. LEF files are important in VLSI design because they enable the interoperability of different design tools from different vend...

Internship - SoC /IP Design at NXP India

Hello Dear Readers, Currently, at NXP India  vacancy for  Internship - SoC /IP Design   role.   We are looking for a Master degree student with Electronics and Communication Engineering, or related field, with an emphasis on SoC design. This is a full-time internship with a duration of about 11-12 months. Job Responsibility: Working with our experienced design team to design state of the art SoC hardware specific segment applications like Automotive, IoT, voice/object recognition, security, smart connectivity and touch sensing . Assisting experienced engineers with End-to-end ownership of SoC Design, Verification and implementation (Physical Design). Design and verify digital and Mixed-signal IPs. Document designs and present results. Job Qualification: Master student in electronic/computer engineering Creative and positive mindset Good knowledge on CMOS technologies Great communication skills, interpersonal skills, teamwork skills and can-do attitude Desire for a ca...

IC Design Engineer at Broadcom

  Hello Dear Readers, Currently, at Broadcom vacancy for an IC Design Engineer role. Job Description: Candidate would be required to work on various phases of SOC physical design activities. The job will include but not limited to block level – floor-planning, partitioning, placement, clock tree synthesis, route, physical verification (LVS/DRC/ERC/Antenna etc). Should be able to meet congestion, timing and area metrics.  Candidate would be required to do equivalence checks, STA, Crosstalk delay analysis, noise analysis, power optimization. Should be able to implement timing and functional ECOs. Should have excellent problem-solving skill to help through congestion resolution and timing closure. Should have experience formal verification and timing analysis and ECO implementation. Experience with tools such as Innovus/Encounter, ICC, Caliber, LEC, Primetime etc is highly desirable. Candidate should be able to work independently and guide other team members. Should be ...