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VLSI Packaging Evolution and Innovations

Hello Dear Readers,   Today in this post, I will provide some deep insight into the VLSI packaging evolution and innovations. Semiconductor packaging has evolved from a simple protective housing into a critical performance enabler. In the modern VLSI landscape, packaging is no longer an afterthought; it is a fundamental determinant of PPA (Power, Performance, and Area) metrics, often dictating the thermal limits and signal integrity of the final SoC. 1. Traditional Packaging Technologies: These methods are the workhorses of the industry, widely used for low-to-medium complexity devices where cost-efficiency is paramount. Wire Bonding (QFN, QFP, DIP): Wire bonding is the most mature interconnection technology. It uses thin gold, copper, or aluminum wires to connect the die's bond pads to the package's internal leadframe. Implementation: The die is attached face-up to a leadframe or substrate. A wire bonder uses thermocompression or ultrasonic energy to attach wires betwee...
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Intern - CAD Automation at Global Foundries

 Hello Dear Readers, 

Currently at Global Foundries vacancy for an Intern - CAD Automation role.

GlobalFoundries is a leading full-service semiconductor foundry providing a unique combination of design, development, and fabrication services to some of the world’s most inspired technology companies. With a global manufacturing footprint spanning three continents, GlobalFoundries makes possible the technologies and systems that transform industries and give customers the power to shape their markets.

Introduction:

This position is for a CAD flow/ EDA Engineer who will work on EDA/CAD related topics. The successful candidate needs to have a good background in working on CAD/EDA infrastructure and needs to be a team player with a solution-oriented approach.

Your Job:  

  • Work on CAD design environment, PDK versioning and enablement and Tool license management related topics.
  • Digital design background with Skill/python, scripting, logic verification and porting database.
  • Support and development for our existing QA flow.
  • Manage timely resolution of issues related to EDA tool features, Tool flows and methodologies
  • Work with cross-geo, cross-vertical teams to understand requirements and communicate resolution

Required Qualifications:

  • Requires a Bachelor of Engineering (B.E.) or equivalent degree in a related field from an accredited university.
  • Language Fluency – Fluent in English Language – written & verbal. 
  • Design Engineer with knowledge of EDA tools and flows - PnR tools, Layout (Virtuoso), PERC etc.
  • Proficiency with data analytics, data organization and be able to understand usage and statistics for EDA tools
  • Must have proficient knowledge of and experience with Unix environment
  • Must have hands-on experience with SKILL language
  • Should be fluent with Cadence EDA tools for schematic and physical layout, design rule checking (DRC), layout versus schematic checking (LVS, schematic and layout extraction, methodology checking) 
  • Must have good technical verbal and written communication skills and ability to work with cross functional teams is necessary
  • Be able to collaborate with program and technical design leads on multiple concurrent projects. 
  • Should have excellent problem-solving skills, written & oral communication, teaming & interpersonal skills
  • Perform all activities in a safe and responsible manner and support all Environmental, Health, Safety & Security requirements and programs
  • Familiarity with standard engineering practices like Version Control systems, Configuration Management and Regression process

Preferred Qualifications:    

  • Knowledge of scripting languages like Python/Perl
  • Experience with PowerBI, Excel, Powerpoint and other office productivity tools
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