Hello Dear Readers, Currently at Dew Software Bangalore vacancy for Design Engineer - STA, SD, Power, PDN role. Dew Software, a leading player in the Digital Transformation space, is seeking a skilled Design Engineer specializing in STA (Static Timing Analysis), SD (Signal Integrity), Power, and PDN (Power Delivery Network) to join our team. Working with Fortune 500 companies to support their digital innovation and transformation strategies, the Design Engineer will be responsible for ensuring the integrity and efficiency of digital designs through comprehensive analysis and optimization. Dew Software is dedicated to delivering exceptional outcomes with cutting-edge technologies, and this is an excellent opportunity to contribute to the growth and success of our clients. Responsibilities: Perform STA (Static Timing Analysis) to ensure design meets timing requirements Conduct signal integrity analysis to optimize signal integrity and minimize signal integrity issues Provide power anal
Hello Dear Readers,
Currently, at Analog Devices Bangalore vacancy for Digital Design Engineer role.
Analog Devices is a global leader in the design and manufacturing of integrated circuits to help solve the toughest engineering challenges. Analog Devices enables our customers to interpret the world around us by intelligently bridging the physical and digital with unmatched technologies that sense, measure and connect. We create innovative solutions to solve design challenges in instrumentation, automation, communications, healthcare, automotive and numerous other industries.
Analog Devices Inc (ADI) is looking for Digital IC Design and Verification Engineers for its Chip Design and development team in Bangalore, India.
The selected students will work on chip development based on ultra-deep submicron semiconductor process technologies. They will be guided and trained by ADI’s experienced design and verification engineers.
- Development of key digital blocks and SoCs.
- Development of optimal micro-architecture and design by analyzing power, performance and area tradeoffs.
- Verification of key digital blocks and SoCs in High Speed signal converter /Communication products.
- Definition of testplan, tests and verification methodology for block and chip-level verification.
- They will use industry leading CAD tools.
- Knowledge of Verilog language
- Knowledge of digital circuit design – combination and sequential
- Hands on any scripting languages such as perl/phyton
- Good Analytical skills
- Should be able to work independently and proactive
Additional Skills being looked for:
- System Verilog
- Any projects on FPGA/matlab would benefit
- Understanding of signal processing/filtering background
- Good understanding of ADCs/DACs
- Basic understanding of pipelining, 8085/any-other-assembly language
Is it a job drive or a direct interview?
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