Hello Dear Readers, Currently at Dew Software Bangalore vacancy for Design Engineer - STA, SD, Power, PDN role. Dew Software, a leading player in the Digital Transformation space, is seeking a skilled Design Engineer specializing in STA (Static Timing Analysis), SD (Signal Integrity), Power, and PDN (Power Delivery Network) to join our team. Working with Fortune 500 companies to support their digital innovation and transformation strategies, the Design Engineer will be responsible for ensuring the integrity and efficiency of digital designs through comprehensive analysis and optimization. Dew Software is dedicated to delivering exceptional outcomes with cutting-edge technologies, and this is an excellent opportunity to contribute to the growth and success of our clients. Responsibilities: Perform STA (Static Timing Analysis) to ensure design meets timing requirements Conduct signal integrity analysis to optimize signal integrity and minimize signal integrity issues Provide power anal
Hello Dear Readers,
Currently, at Truechip vacancy for an SoC Verification Engineer role.
Required Experience: 1 to 3 years
Location: Bangalore, Delhi NCR, Hyderabad
Openings: 8-10
Education: BE/B.Tech./MS/M.Tech.(Electronics or Electronics & Communication)
Worked on IP level verification environment:
- 1 to 3 years of experience
- Good experience with Verilog, System Verilog and UVM
- Experience with verification for protocols like AXI or AHB
- Experience with any of the following protocols: DDR, PCIe, Ethernet, MIPI, USB
- Excellent Team Player
- Experience in SOC Verification
- Experience in Formal verification
- Experience in verification of automotive protocols
- If interested please share your profile to: sweta.srivastava@truechip.net
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