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Physical Design/PDK methodology Engineer

Hello Dear Readers, At Applied Materials Bangalore, there is a vacancy for a Physical Design/PDK methodology Engineer role. Applied Materials is a global leader in materials engineering solutions used to produce virtually every new chip and advanced display in the world. We design, build and service cutting-edge equipment that helps our customers manufacture display and semiconductor chips – the brains of devices we use every day. As the foundation of the global electronics industry, Applied enables the exciting technologies that literally connect our world – like AI and IoT. If you want to push the boundaries of materials science and engineering to create next generation technology, join us to deliver material innovation that changes the world.  Key Responsibility: Expertise in PDK enablement and library  validation/automation. Hands-on experience with LVS/Parasitic extraction/standard cell characterization flows and methodologies Design/System level experience with DTCO and ...
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RTL Design Engineer at OpenFive

 Hello Dear Readers,

Currently, at OpenFive vacancy for RTL Design Engineer role.

OpenFive is looking for an individual with strong RTL Design skills. The SOC IP Team is responsible for all in-house soft and hard IPs. As an employee, you will have the opportunity to work on any of the IPs in our portfolio, which are as follows:

  •  100G/400G Ethernet
  • Memory Controllers and Soft PHYs
  • High Throughput/Low Latency Interlaken Controllers
  • D2D Controllers

We are a team with soft boundaries across teams and it is possible for you to work on one or more of these IPs from time to time. You would also get the opportunity to work on these IPs targeted for the latest tech nodes from different foundries Ex 5nm, 7nm etc. We also tapeout test-chips on a regular basis to prove our IPs in Silicon. This provides an excellent opportunity for you to learn the entire tapeout process and post-silicon validation as well.
Our Team focuses on high-quality of work and strong work ethic! We have a very exciting workplace and look forward to having you on-board.
The job profile involves the following at broad level and depending on the grade you are hired for you will get to work on various aspects of the job profile.
 
Our workplace provides an excellent opportunity to enhance your skill set not only in RTL Design and Verification but an all-round perspective:

  • Understanding of the IP marketplace
  • View into the overall semiconductor industry trends
  • Development of Industry Standard requirements and thus better Design/Verification ethics

 

Responsibilities:

  • Will be given an independent block(s) in an IP to be owned end-to-end which includes Microarch development, RTL design, review of Verification plan and full debug support
  • Required to support Emulation activities as well
  • Will need to guide juniors technically.
  • Interface with customers on various deliverables

Requirements:

  • Minimum 2 years of experience in RTL Design
  • Candidate must have Worked on RTL design of major blocks
  • Worked on micro-arch of major blocks
  • Strong knowledge in Design (Verilog) and verification aspects of design
  • Experienced at least one complete delivery from start to finish
  • Good analytical and Debug skills
  • Good knowledge in at least one/two of these protocols
  • HBM or DDR , Ethernet, Interlaken, AMBA
  • Expected to have very deep knowledge/understanding on the blocks that you have worked on
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