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Physical Design Methodology Engineer at Texas Instruments

  Hello Dear Readers, Texas Instruments Bangalore has a vacancy for the Physical Design Engineer role. We need an Physical Design Methodology Engineer to join our ATD team. The candidate should have a strong background in back-end design of ASIC/SoC chips. The ideal candidate will have a bachelor’s or master’s degree in Electrical Engineering or a related field. Requirements: 1 - 2 Years of experience in physical design Bachelor’s or master’s degree in Electrical/Electronics Engineering or a related field Strong understanding of physical design principles Must know the basics of floorplan, placement, CTS, routing, ECO, Physical Verification Proficiency in back-end design tools, such as Cadence Genus/Innovus/Tempus/Voltus Excellent problem-solving skills and attention to detail Effective communication and collaboration skills Responsibilities: Synthesis to GDSII Perform full Physical design flow and its verification Work closely with Digital Design and DFT engineers Ensure...

RTL Design Engineer at Texas Instruments

Hello Dear Readers, Texas Instruments Bangalore has a vacancy for the RTL Design Engineer role. Are you looking for a career at one of the leading semiconductor companies in the world Texas Instruments (TI) is looking for a Digital Design Engineer to join the team of enthusiastic engineers who develop highly complex mixed signal devices for audio applications with industry leading performance. These audio products are truly mixed-signal devices with highly integrated digital circuits such as a DSP core for digital filters and audio signal processing blocks, hardware processing blocks, analog controllers, various serial interfaces (Audio serial interfaces, I2C, SPI) and other digital blocks like clock-generation, registers map, Interrupts etc. This is a great opportunity to be part of an established team that’s continuing to look for growth opportunities, working with worldwide leading customers and developing cutting edge solutions in the areas of consumer electronics, industrial and...

Product Engineer - STA at Siemens India

Hello Dear Readers, Currently, at  Siemens EDA (Siemens Digital Industries Software)  vacancy for Product Engineer - STA role. This is your role: Working on 7nm and 5nm designs with various customers for deployment of Aprisa place and route tools. Are you expertised in solving customer's problems for critical designs to achieve desired performance, area and power targets! Responsible to develop flow and methodology for doing placement, CTS and routing. Also, provide training and technical support to customers using Aprisa tools We don’t need superheroes, just superminds! We are looking for someone with hands on experience in Physical Design (floorplan, placement, CTS and routing) and timing closure of complex blocks and/or Full Chip designs. Hands-on experience with commercial place & route tools like Synopsys-lCC2, Cadence-Innovus or Aprisa is a must. Tapeout experience of 2 or more projects is a must. Do you have good understanding of timing, power and area trade-of...

Sr Solutions Engineer – AE (Pegasus DRC/LVS runsets) at Cadence Design Systems

Hello Dear Readers, Cadence Design Systems has a vacancy for a Senior Solutions Engineer-AE (Pegasus DRC/LVS sunsets ) role. Cadence is a pivotal leader in electronic design, building upon more than 30 years of computational software expertise. The company applies its underlying Intelligent System Design strategy to deliver software, hardware and IP that turn design concepts into reality.  Cadence customers are the world’s most innovative companies, delivering extraordinary electronic products from chips to boards to systems for the most dynamic market applications including consumer, hyperscale computing, 5G communications, automotive, aerospace industrial and health. The Cadence Advantage: The opportunity to work on cutting-edge technology in an environment that encourages you to be creative, innovative, and to make an impact. Cadence’s employee-friendly policies focus on the physical and mental well-being of employees, career development, providing opportunities for learning, a...

Verilog Code of Floating-Point Multiplier Design.

  Hello Dear Readers,   Today in this post, I will provide some deep insight into the floating point multiplier. It's design, algorithms, and implementation using Verilog HDL languages. First, let us understand what is  IEEE Standard 754 Floating Point Numbers.  The IEEE Standard for Floating-Point Arithmetic (IEEE 754) is a technical standard for floating-point computation which was established in 1985 by the  Institute of Electrical and Electronics Engineers (IEEE) . The standard addressed many problems found in the diverse floating point implementations that made them difficult to use reliably and reduced their portability. IEEE Standard 754 floating point is the most common representation today for real numbers on computers, including Intel-based PC’s, Macs, and most Unix platforms. There are several ways to represent floating point number but IEEE 754 is the most efficient in most cases. IEEE 754 has 3 basic components: The Sign of Mantissa –  This is ...