Hello Dear Readers, Currently, at  Siemens EDA (Siemens Digital Industries Software)  vacancy for Product Engineer - STA role. This is your role: Working on 7nm and 5nm designs with various customers for deployment of Aprisa place and route tools. Are you expertised in solving customer's problems for critical designs to achieve desired performance, area and power targets! Responsible to develop flow and methodology for doing placement, CTS and routing. Also, provide training and technical support to customers using Aprisa tools We don’t need superheroes, just superminds! We are looking for someone with hands on experience in Physical Design (floorplan, placement, CTS and routing) and timing closure of complex blocks and/or Full Chip designs. Hands-on experience with commercial place & route tools like Synopsys-lCC2, Cadence-Innovus or Aprisa is a must. Tapeout experience of 2 or more projects is a must. Do you have good understanding of timing, power and area trade-of...

Hello Dear Readers, Cadence Design Systems has a vacancy for a Senior Solutions Engineer-AE (Pegasus DRC/LVS sunsets ) role. Cadence is a pivotal leader in electronic design, building upon more than 30 years of computational software expertise. The company applies its underlying Intelligent System Design strategy to deliver software, hardware and IP that turn design concepts into reality.  Cadence customers are the world’s most innovative companies, delivering extraordinary electronic products from chips to boards to systems for the most dynamic market applications including consumer, hyperscale computing, 5G communications, automotive, aerospace industrial and health. The Cadence Advantage: The opportunity to work on cutting-edge technology in an environment that encourages you to be creative, innovative, and to make an impact. Cadence’s employee-friendly policies focus on the physical and mental well-being of employees, career development, providing opportunities for learning, a...

  Hello Dear Readers,   Today in this post, I will provide some deep insight into the floating point multiplier. It's design, algorithms, and implementation using Verilog HDL languages. First, let us understand what is  IEEE Standard 754 Floating Point Numbers.  The IEEE Standard for Floating-Point Arithmetic (IEEE 754) is a technical standard for floating-point computation which was established in 1985 by the  Institute of Electrical and Electronics Engineers (IEEE) . The standard addressed many problems found in the diverse floating point implementations that made them difficult to use reliably and reduced their portability. IEEE Standard 754 floating point is the most common representation today for real numbers on computers, including Intel-based PC’s, Macs, and most Unix platforms. There are several ways to represent floating point number but IEEE 754 is the most efficient in most cases. IEEE 754 has 3 basic components: The Sign of Mantissa –  This is ...

Hello Dear Readers, Currently, at MIPS India  vacancy for a Verification Engineer or Senior Verification Engineer SOC role. We are seeking an experienced Verification Engineer or Senior Verification Engineer SOC. This position involves extensive hands-on experience with CPU verification using industry-standard functional verification methodologies, formal verification, and constrained random generators, and reference model-based checkers. The candidate must be able to take critical decisions and completely own verification closure for a block or feature. This position involves cross-functional interaction with CPU designers and architects and working across sites to ensure high-quality CPU designs for customers. You will: Take full ownership and drive verification efforts to closure Work closely with designers and architects to understand specifications at unit/top level Understand use cases and develop functional test plans Develop directed tests written in C, Assembly, and System...