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Showing posts with the label Computer Hardware Principles

Design Engineer - STA, SD, Power, PDN at Dew Software

Hello Dear Readers,   Currently at Dew Software Bangalore vacancy for Design Engineer - STA, SD, Power, PDN role. Dew Software, a leading player in the Digital Transformation space, is seeking a skilled Design Engineer specializing in STA (Static Timing Analysis), SD (Signal Integrity), Power, and PDN (Power Delivery Network) to join our team. Working with Fortune 500 companies to support their digital innovation and transformation strategies, the Design Engineer will be responsible for ensuring the integrity and efficiency of digital designs through comprehensive analysis and optimization. Dew Software is dedicated to delivering exceptional outcomes with cutting-edge technologies, and this is an excellent opportunity to contribute to the growth and success of our clients. Responsibilities: Perform STA (Static Timing Analysis) to ensure design meets timing requirements Conduct signal integrity analysis to optimize signal integrity and minimize signal integrity issues Provide power anal

SpacemiT makes important breakthroughs in RISC-V High-Performance Cores

  Hello Dear Readers,   Today in this post I will provide some deep insight into what is happening in the semiconductor industry. So hope you like it and enjoy it to improve your knowledge and awareness about the industry. So let's start it today we are discussing,  SpacemiT making significant breakthroughs in RISC-V. SpacemiT  develops its first-generation RISC-V fusion computing processor core – the X100. X100 has made significant leaps with its general-purpose and application-oriented fusion computing capabilities. The general-purpose computing performance of the X100 is better than that of the ARM A75 and it outperforms ARM A76 significantly in AI Applications, Vision Applications, and Robot Applications. As a high-performance fusion processor core in RISC-V architecture, the X100 will be used in the production of SpacemiT chips and with application scenarios that have a relatively high demand for computing power. These will include high-performance CPUs, Edge Computing, pan-in

Design Verification Engineer at Micron Technology

  Hello Dear Readers,   Currently, at Micron Technology vacancy for Design Verification Engineer role. Join an inclusive team passionate about one thing: using their expertise in the relentless pursuit of innovation for customers and partners. The solutions we build help make everything from virtual reality experiences to breakthroughs in neural networks possible. We do it all while committing to integrity, sustainability, and giving back to our communities. Because doing so can fuel the very innovation we are pursuing. Responsibilities will include, but are not limited to: Provide verification support to design projects by simulating, analyzing, and debugging pre-silicon block level/full chip designs. Develop Test cases/Stimulus to increase the functional coverage for all DRAM and emerging memory architectures and features. Develop and maintain test benches and test vectors using simulation tools and run regressions for coverage analysis and improvements. Co-work with international co

ASIC Verification Engineer at Juniper Networks

Hello Dear Readers, Currently, at Juniper Networks Banglore vacancy for an ASIC Verification Engineer role. Juniper is a leading provider of advanced routers and switches for the internet. We keep the world connected with speed, reliability, security, and ease of use. We believe in excellence and we strive to achieve that through employee motivation, training, and teamwork within a collaborative and innovative culture. Want to be a part of a fast-paced team responsible for delivering high-speed ASICs for large, complex systems? Our team at Silicon Systems Technology Group (SST) is seeking ASIC Verification Engineers to verify the next generation of ASICs for new core routers, switches, and firewalls. We are looking to hire sharp individuals with excellent communication, problem-solving, and leadership skills. Responsibilities: You will be exposed to the latest verification methodologies like UVM and enable complex feature verification suites. Architect and Develop block level verificat

SoC Verification Engineer at Truechip

  Hello Dear Readers,   Currently, at Truechip vacancy for an SoC Verification Engineer role. Post: SoC Verification Engineer Required Experience: 1 to 3 years Location: Bangalore, Delhi NCR, Hyderabad Openings: 8-10 Education: BE/B.Tech./MS/M.Tech.(Electronics or Electronics & Communication) Worked on IP level verification environment: 1 to 3 years of experience Good experience with Verilog, System Verilog and UVM Experience with verification for protocols like AXI or AHB Experience with any of the following protocols: DDR, PCIe, Ethernet, MIPI, USB Excellent Team Player Experience in SOC Verification Experience in Formal verification Experience in verification of automotive protocols If interested please share your profile to:  sweta.srivastava@truechip.net Connect with me  1.Linkedln 2.Instagram 3.Facebook 4.WhatsApp  

SYSTEM VIP Verification Engineer at Cadence Design System

  Hello Dear Readers, Currently, at Cadence Design System vacancy for a SYSTEM VIP Verification Engineer role. Job Description:  Good experience on SOC level performance analysis and System level scenarios validation Hands-on DDR interface, peripherals Ethernet, DMA transfer and System level I/O coherency testing Worked on the AXI/Ace/Other Amba protocols debug and C test case development Overall hands on exp on SOC DV flows and test case development for ARM based SOCs Advantage: Good knowledge in software languages (C++/PYTHON/JAVA/JAVA Script) Customer support experience Knowledge in scripting Perl /shell scripting or similar languages ·         Educational Qualification :  BE/BTech or ME/ M.Tech  Graduate wit.h Computer Science/Electronics & Communication/Electrical & Electronics/VLSI engineering or any other equivalent courses. If interested please share your profile to:  rajesha@cadence.com     Connect with me  1.Linkedln 2.Instagram 3.Facebook 4.WhatsApp

Verification Engineer - On contract at MediaTek Bangalore

   Hello Dear Readers,   Currently at MediaTek Bangalore vacancy for Verification Engineer - On contract role. About the job: 1-year contract. Rollover contract. 0-2 years of experience in   SV / UVM. Ability to trace, debug and root cause failures in the RTL code. Must be familiar with waveform debug tools like Verdi and Mentor’s visualizer. Cognizant with   SV   functional coverage, assertions. Implement SV coverage points and assertions. Familiar with AMBA protocols (AXI, AHB, APB). Desirable : Perl scripting, experience with bus matrix verification (NOC), familiarity with protocols like PCIe SDIO and experience with cross-geo communication. Company Overview: MediaTek is a global fabless semiconductor company that enables more than 2 billion consumer products a year. We are a market leader in developing tightly-integrated, power-efficient systems-on-chip (SoC) for mobile devices, home entertainment, network and connectivity, automated driving, and IoT. MediaTek’s mission is to prov

Design Implementation Staff Engineer - Graphics at Qualcomm

   Hello Dear Readers, Currently, at Qualcomm Bangalore vacancy for a Design Implementation Staff Engineer role. Qualcomm Overview: Qualcomm is a company of inventors that unlocked 5G ushering in an age of rapid acceleration in connectivity and new possibilities that will transform industries, create jobs, and enrich lives. But this is just the beginning. It takes inventive minds with diverse skills, backgrounds, and cultures to transform 5Gs potential into world-changing technologies and products. This is the Invention Age - and this is where you come in. General Summary: Job Function/General Responsibilities, The Design Implementation Engineer will work in Qualcomm's Adreno GPU team and will be responsible for managing all aspect of front end implementation design challenges and methodology. As a member of the Graphics team, the successful applicant will help integrate, implement and deliver state of the art GPU cores and will be working closely with the graphics microarchitectur