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Physical Design Methodology Engineer at Texas Instruments

  Hello Dear Readers, Texas Instruments Bangalore has a vacancy for the Physical Design Engineer role. We need an Physical Design Methodology Engineer to join our ATD team. The candidate should have a strong background in back-end design of ASIC/SoC chips. The ideal candidate will have a bachelor’s or master’s degree in Electrical Engineering or a related field. Requirements: 1 - 2 Years of experience in physical design Bachelor’s or master’s degree in Electrical/Electronics Engineering or a related field Strong understanding of physical design principles Must know the basics of floorplan, placement, CTS, routing, ECO, Physical Verification Proficiency in back-end design tools, such as Cadence Genus/Innovus/Tempus/Voltus Excellent problem-solving skills and attention to detail Effective communication and collaboration skills Responsibilities: Synthesis to GDSII Perform full Physical design flow and its verification Work closely with Digital Design and DFT engineers Ensure...
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Design Implementation Staff Engineer - Graphics at Qualcomm

Hello Dear Readers,

Currently, at Qualcomm Bangalore vacancy for a Design Implementation Staff Engineer role.

Qualcomm Overview:

Qualcomm is a company of inventors that unlocked 5G ushering in an age of rapid acceleration in connectivity and new possibilities that will transform industries, create jobs, and enrich lives. But this is just the beginning. It takes inventive minds with diverse skills, backgrounds, and cultures to transform 5Gs potential into world-changing technologies and products. This is the Invention Age - and this is where you come in.

General Summary:

Job Function/General Responsibilities,

  • The Design Implementation Engineer will work in Qualcomm's Adreno GPU team and will be responsible for managing all aspect of front end implementation design challenges and methodology.
  • As a member of the Graphics team, the successful applicant will help integrate, implement and deliver state of the art GPU cores and will be working closely with the graphics microarchitecture and physical design teams.
  • The role will also include working with execution driven teams for tape-outs by supporting new methodologies and new flows required to address better QoR like performance, power and area.
  • The successful candidate will possess in-depth understanding of ASIC design flow and the challenges posed by advanced deep sub-micron technologies.
  • Experience with digital design and RTL development,
  • Experience with front end EDA tools such as Synopsys Next Generation tools, Conformal LEC, Synopsys Formality and Synopsys PrimeTime

Preferred Qualifications:

  • Knowledge and experience of graphics design and development
  • Proficient in Perl, TCL and shell scripting
  • Excellent interpersonal and team skills yet able to work independently and able to problem solve complex, unique and detailed issues
  • Be Familiar with The latest EDA tools for synthesis, formal verification, timing analysis and physical design

Education Requirements:

Required: Bachelor's degree in Computer Science, Electrical Engineering, Information Systems, or a related field.
Preferred: Master's degree in Computer Science, Electrical Engineering, Information Systems, or a related field.


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