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Verification Engineer or Senior Verification Engineer SOC at MIPS India

Hello Dear Readers, Currently, at MIPS India  vacancy for a Verification Engineer or Senior Verification Engineer SOC role. We are seeking an experienced Verification Engineer or Senior Verification Engineer SOC. This position involves extensive hands-on experience with CPU verification using industry-standard functional verification methodologies, formal verification, and constrained random generators, and reference model-based checkers. The candidate must be able to take critical decisions and completely own verification closure for a block or feature. This position involves cross-functional interaction with CPU designers and architects and working across sites to ensure high-quality CPU designs for customers. You will: Take full ownership and drive verification efforts to closure Work closely with designers and architects to understand specifications at unit/top level Understand use cases and develop functional test plans Develop directed tests written in C, Assembly, and SystemVeri
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VLSI ASIC library design Engineer Trainee at Exiger Technologies

Hello Dear Readers,

Currently, at Exiger Technologies Bangalore vacancy for the VLSI ASIC library design Engineer Trainee role.

Job description:

We are looking for B Tech/M Tech EC/EE graduates from the year 2022 batch to be trained as Std cell/Memory design/AMS verification and characterization engineers. The selected candidates will undergo intense training in the above areas and will have opportunities to work in Advanced Technology Nodes. Please note that we are not considering 2023 graduates for these roles.


Requirements:

  • Should have consistently scored above 70% in the academic programs
  • Candidates should have preferably done projects or trained in the VLSI domain such as Analog Design/Digital Design/Physical design
  • Good in CMOS-based design, circuit analysis

Apply Here

  

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