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Physical Design Methodology Engineer at Texas Instruments

  Hello Dear Readers, Texas Instruments Bangalore has a vacancy for the Physical Design Engineer role. We need an Physical Design Methodology Engineer to join our ATD team. The candidate should have a strong background in back-end design of ASIC/SoC chips. The ideal candidate will have a bachelor’s or master’s degree in Electrical Engineering or a related field. Requirements: 1 - 2 Years of experience in physical design Bachelor’s or master’s degree in Electrical/Electronics Engineering or a related field Strong understanding of physical design principles Must know the basics of floorplan, placement, CTS, routing, ECO, Physical Verification Proficiency in back-end design tools, such as Cadence Genus/Innovus/Tempus/Voltus Excellent problem-solving skills and attention to detail Effective communication and collaboration skills Responsibilities: Synthesis to GDSII Perform full Physical design flow and its verification Work closely with Digital Design and DFT engineers Ensure...
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RTL Front End Design Engineers at Wafer Space Bangalore

Hello Dear Readers,

Currently, at Wafer Space Bangalore vacancy for an RTL Front End Design Engineers role.

Job Responsibilities:

  • Chip integration of high complexity SOCs.
  • Coordinating with various IP owners on receivables and DV, synthesis and Emulation for deliverables
  • Spyglass/CDC for the full chip and will evaluate the incoming bugs and take appropriate action
  • Formal Verification between RTL to Netlist and Netlist to Netlist
  • Manual and Conformal ECO
  • Running Lint (Spyglass) at SoC level.
  • Chip-level integration and connectivity.
  • Debugging FV failures
  • ECO implementation.


Desired Skills and Experience:

  • 2 - 10 years of experience
  • Sound knowledge in Micro Architecture design and RTL implementation
  • Understanding of ARM SoCs with AXI/AHB buses, peripherals, CPUs, and mobile SOCs is desirable
  • Experience in Synthesis and pre-layout timing analysis
  • Understanding of DFT flow is desirable
  • Experiencing using clear case a must
  • Experienced with VHDL/Verilog/coding and tools like VCS/Verdi/Spyglass/Mentor Zero-in
  • Proficiency in LEC and formal flows.
  • Experience in Perl, TCL, and shell scripting
  • Excellent interpersonal & analytical skills with the ability to work independently

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