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VLSI Packaging Evolution and Innovations

Hello Dear Readers,   Today in this post, I will provide some deep insight into the VLSI packaging evolution and innovations. Semiconductor packaging has evolved from a simple protective housing into a critical performance enabler. In the modern VLSI landscape, packaging is no longer an afterthought; it is a fundamental determinant of PPA (Power, Performance, and Area) metrics, often dictating the thermal limits and signal integrity of the final SoC. 1. Traditional Packaging Technologies: These methods are the workhorses of the industry, widely used for low-to-medium complexity devices where cost-efficiency is paramount. Wire Bonding (QFN, QFP, DIP): Wire bonding is the most mature interconnection technology. It uses thin gold, copper, or aluminum wires to connect the die's bond pads to the package's internal leadframe. Implementation: The die is attached face-up to a leadframe or substrate. A wire bonder uses thermocompression or ultrasonic energy to attach wires betwee...
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RTL Front End Design Engineers at Wafer Space Bangalore

Hello Dear Readers,

Currently, at Wafer Space Bangalore vacancy for an RTL Front End Design Engineers role.

Job Responsibilities:

  • Chip integration of high complexity SOCs.
  • Coordinating with various IP owners on receivables and DV, synthesis and Emulation for deliverables
  • Spyglass/CDC for the full chip and will evaluate the incoming bugs and take appropriate action
  • Formal Verification between RTL to Netlist and Netlist to Netlist
  • Manual and Conformal ECO
  • Running Lint (Spyglass) at SoC level.
  • Chip-level integration and connectivity.
  • Debugging FV failures
  • ECO implementation.


Desired Skills and Experience:

  • 2 - 10 years of experience
  • Sound knowledge in Micro Architecture design and RTL implementation
  • Understanding of ARM SoCs with AXI/AHB buses, peripherals, CPUs, and mobile SOCs is desirable
  • Experience in Synthesis and pre-layout timing analysis
  • Understanding of DFT flow is desirable
  • Experiencing using clear case a must
  • Experienced with VHDL/Verilog/coding and tools like VCS/Verdi/Spyglass/Mentor Zero-in
  • Proficiency in LEC and formal flows.
  • Experience in Perl, TCL, and shell scripting
  • Excellent interpersonal & analytical skills with the ability to work independently

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