Hello Dear Readers,
Currently, Cisco Bangalore has a vacancy for RTL - ASIC design and verification engineer role.
Cisco SiliconOne team is looking for a talented and a dynamic design verification engineer. You will have an ASIC background with hands-on experience in design verification, system testing, with in-depth knowledge of ASIC/SoC development cycle, the best industry practices, from specification through tape-out and lab validation, and a proven track record of success in high-performance/high-volume products.
We are looking for motivated individuals, who have excellent analytical and problem solving abilities, who are open and have the ability to assimilate new techniques and enjoy challenging tasks.
Who You Are:
- Proficient in Verilog
- Have extensive experience in ASIC front end design
- Strong experience with synthesis, timing analysis and power analysis
- Perl/Python/Makefile scripting is strongly preferred
- Experience designing ASICs for networking protocols (Ethernet, FC) a plus
- Must be strong at documenting the design specifications, verification plan and presentations
- Strong problem solving and ASIC debugging skills
- Ability to debug system wide issues
- MSEE or BSEE with 2+ years of related experience.
Trained fresher allowed?
ReplyDeleteGood morning sir I have been selected for this position. So thanks from bottom of my heart ❤️
ReplyDeleteHappy to hear from you
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