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Physical Design Methodology Engineer at Texas Instruments

  Hello Dear Readers, Texas Instruments Bangalore has a vacancy for the Physical Design Engineer role. We need an Physical Design Methodology Engineer to join our ATD team. The candidate should have a strong background in back-end design of ASIC/SoC chips. The ideal candidate will have a bachelor’s or master’s degree in Electrical Engineering or a related field. Requirements: 1 - 2 Years of experience in physical design Bachelor’s or master’s degree in Electrical/Electronics Engineering or a related field Strong understanding of physical design principles Must know the basics of floorplan, placement, CTS, routing, ECO, Physical Verification Proficiency in back-end design tools, such as Cadence Genus/Innovus/Tempus/Voltus Excellent problem-solving skills and attention to detail Effective communication and collaboration skills Responsibilities: Synthesis to GDSII Perform full Physical design flow and its verification Work closely with Digital Design and DFT engineers Ensure...
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Design Engineer II at Cadence Design System

 Hello Dear Readers,

Currently, at Cadence Banglore vacancy for the Design Engineer II role.

Job Description:

  • 0-2+ years of design verification experience.
  • B.Tech/B.E/M.Tech/M.E in Electronics/Electrical/Computer Science
  • Thorough understanding of UVM/SV based verification environment to build flexible and reusable complex testbenches
  • Working experience on advanced protocols like PCIe/USB/Ethernet
  • Proven experience in leading a verification project to completion.
  • Experience in Emulation and Formal Verification will be plus
  • Exposure to scripting languages (Perl/Shell/Python)
  • Self-starter and learner with a passion for getting the job done on time with great quality
  • Strong problem solving and analytical skills
  • Excellent verbal and written communications skills

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