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Physical Design/PDK methodology Engineer

Hello Dear Readers, At Applied Materials Bangalore, there is a vacancy for a Physical Design/PDK methodology Engineer role. Applied Materials is a global leader in materials engineering solutions used to produce virtually every new chip and advanced display in the world. We design, build and service cutting-edge equipment that helps our customers manufacture display and semiconductor chips – the brains of devices we use every day. As the foundation of the global electronics industry, Applied enables the exciting technologies that literally connect our world – like AI and IoT. If you want to push the boundaries of materials science and engineering to create next generation technology, join us to deliver material innovation that changes the world.  Key Responsibility: Expertise in PDK enablement and library  validation/automation. Hands-on experience with LVS/Parasitic extraction/standard cell characterization flows and methodologies Design/System level experience with DTCO and ...
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Design IP Verification Engineer II at Cadence Design System

 Hello Dear Readers,

Currently, at Cadence Banglore, Noida vacancy for Design IP Verification Engineer II role.

Job Description: 

Design Verification Engineer for IP development team.


  • Verification role for Serial and Interface Design IPs verification (PCIe, CCIX, CXL, USB, Ethernet, SATA/SAS, UFS, SPI, HDMI, MIPI, I3C)
  • UVM testbench development to build a robust, scalable and efficient testbench to verify the design IPs.
  • In addition to UVM functional verification, the role could involve Formal verification of complex design modules.
  • In addition to UVM functional verification, role could involve participating in Emulation qualification of design IPs.
  • Understand design and produce detailed verification strategy and test plan.
  • Self-starter and learner with passion for getting the job done on time with great quality.
  • Strong problem solving, analytical and debug skills
  • Excellent verbal and written communications skills
  • Clearly communicate project status, issues etc.

Position Requirements:

  • BE/BTech/ME/MTech - Electrical / Electronics / VLSI with an experience as a design and verification engineer.
  • Strong background on functional verification fundamentals, environment planning, test plan generation, environment development is a must.
  • Design Verification experience verifying complex designs and leading projects from concept to verification closure.
  • Strong hands-on UVM and System Verilog coding experience and functional verification environment development is required.
  • Experience working on verifying any Serial IP or Interface protocols (PCIe, CCIX, CXL, USB, Ethernet, SATA/SAS, UFS, SPI, HDMI, MIPI, I3C)
  • Formal verification and/or Emulation experience is highly desirable.

  • AMBA protocol (AXI5, CHI, CXS) experience is desirable.
  • Familiarity with using 3rd party VIPs, Cadence preferred.
  • Team player with strong communication skills, and ability to work independently on the verification of a portion of the design.
  • Prior experience in IP development teams would be an added advantage.


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