Hello Dear Readers, Texas Instruments Bangalore has a vacancy for the Physical Design Engineer role. We need an Physical Design Methodology Engineer to join our ATD team. The candidate should have a strong background in back-end design of ASIC/SoC chips. The ideal candidate will have a bachelor’s or master’s degree in Electrical Engineering or a related field. Requirements: 1 - 2 Years of experience in physical design Bachelor’s or master’s degree in Electrical/Electronics Engineering or a related field Strong understanding of physical design principles Must know the basics of floorplan, placement, CTS, routing, ECO, Physical Verification Proficiency in back-end design tools, such as Cadence Genus/Innovus/Tempus/Voltus Excellent problem-solving skills and attention to detail Effective communication and collaboration skills Responsibilities: Synthesis to GDSII Perform full Physical design flow and its verification Work closely with Digital Design and DFT engineers Ensure...
Hello Dear Readers, Today in this post I will provide some basics to advanced ARM's assembly language practice QA part-4, I have used the Keil tool for code writing. Q-1). Write an assembly language program that performs a mode change by modifying the contents of the CPSR. a. The mode you should change to is user mode, and you have to modify the mode field of CPSR by the value of 0x10. b. This assumes that the current mode is a privileged mode such as supervisor mode. Code: ; program which changes the microprocessor mode masking equ 0x1f user_mode equ 0x10 area change, code, readonly entry MRS R0,CPSR; read the status of the microprocessor BIC R0, R0,#masking; apply the masking bit ORR R0,R0,#user_mode ; set the mode user_mode MSR CPSR_C,R0 ; written back with control_field_mask END Output: Q-2). Write an assembly language program that generates S...