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Showing posts from August, 2021

RTL Design Engineer at Skyroot Aerospace

Hello, Dear Readers, Skyroot Aerospace has a vacancy for the RTL Design Engineer role. About Skyroot Aerospace: A cutting-edge startup founded by ex-ISRO scientists. Dedicated to affordable space access, we're rewriting aerospace technology rules. Our dynamic team fosters inventiveness, collaboration, and relentless excellence. Join us on a transformative journey to redefine space possibilities. Welcome to the forefront of space innovation with Skyroot Aerospace! Purpose of role: Understand architectural requirements and Design micro-architecture, implement design blocks using VHDL/Verilog for FPGA based Avionics packages for orbital launch vehicles and ground infrastructure. Job Requirements: 2+ Years of RTL and system design experience. Strong knowledge on Digital System Design (DSD). Strong knowledge of RTL/SoC design/integration with VHDL/Verilog. Strong knowledge in problem solving and debugging skills. Ability to understand architectural requirements and Design micro-archite...
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CMOS Inverter-Layout Design And It functional Verification SPICE Simulation

  Hello Dear Readers, Today, I will explain how to design a Layout in the MAGIC layout tool and how to perform SPICE simulation. CMOS inverters (Complementary NMOSFET Inverters) are some of the most widely used and adaptable MOSFET inverters used in chip design. They operate with very little power loss and at relatively high speed. Furthermore, the CMOS inverter has good logic buffer characteristics, in that, its noise margins in both low and high states are large. A CMOS inverter containing a PMOS and an NMOS transistor connected at the drain and gate terminals, a supply voltage VDD at the PMOS source terminal, and a ground connection at the NMOS source terminal Vin is connected to the gate terminals, and Vout is connected to the drain terminals As shown in Fig.1 is a circuit-level symbol but in the layout-wise internal structure of CMOS is consisted of common P-Type Substrate for building NMOS and N-Well implanted for building PMOS as shown in Fig.2.         ...
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What is Instruction Set Architecture (ISA) In Modern CPUs

  Hello Dear Readers, Today, I will explain what is ISA and how it is used to build digital computer systems. ISA is an important issue in hardware/software codesign. An ISA tells compiler developers “what a CPU can do,” and tells CPU designers “what a CPU should do.” Compiler developers use the ISA to develop compilers, and CPU designers design a CPU to implement the ISA. That is, an ISA is an interface between software and hardware, as shown in Fig.1. Fig.1 ISA as an interface between software and hardware An ISA defines the formats of instructions, the operations of instructions, the types of operands, the memory and registers the instructions can access, the byte order, and the addressing modes. Some popular ISAs include Intel’s x86, SGI/MIPS’s MIPS32/MIPS64, IBM’s PowerPC, SUN Microsystems’ SPARC, HP’s HP-PA, and ARM’s ARM. 1).  Instruction Types: An instruction type refers to what kind of operation is done by an instruction. The instruction types differ between ISA...
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The Microwind MOS Generator

  Hello Dear Readers, Today, I will explain how to use Microwind inbuilt MOS generator. My first post regarding  Microwind  got responses as expected so I will try to make complete series of the Microwind tutorial which makes you technically stronger. So Let's start with how to use Microwind to create our transistor layouts. Launch Microwind and examine the screen. The palette window appears. The top portion of the palette menu is shown in Fig.1. Notice the button which is a circle by a blue pen that looks like a FET circuit symbol. This provides access to the MOS generator routine in Microwind. When you click on it will be brought up on the dialog screen. Fig.1 MOS Layout Generator button The MOS Layout Generator has several options, all of which are controlled by the screen shown in Fig.2. The Channel length L is preset by the selected process. Normally the channel length will be left at the default value, but the designer adjusts the value of W according to the circui...
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What is High Level Synthesis(HLS)

  Hello Dear Readers, Today, I will explain what is HLS(High-Level Synthesis). The hardware design process has evolved significantly over the years. When the circuits were small, hardware designers could more easily specify every transistor, how they were wired together, and their physical layout. Everything was done manually. As our ability to manufacture more transistors increased, hardware designers began to rely on automated design tools to help them in the process of creating the circuits. These tools gradually become more and more sophisticated and allowed hardware designers to work at higher levels of abstraction and thus become more efficient. Rather than specify the layout of every transistor, a hardware designer could instead specify digital circuits and have electronic design automation (EDA) tools automatically translate these more abstract specifications into a physical layout. The Mead and Conway approach of using a programming language (e.g., Verilog or VHDL) that co...
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