Hello Dear Readers, Texas Instruments Bangalore has a vacancy for the Physical Design Engineer role. We need an Physical Design Methodology Engineer to join our ATD team. The candidate should have a strong background in back-end design of ASIC/SoC chips. The ideal candidate will have a bachelor’s or master’s degree in Electrical Engineering or a related field. Requirements: 1 - 2 Years of experience in physical design Bachelor’s or master’s degree in Electrical/Electronics Engineering or a related field Strong understanding of physical design principles Must know the basics of floorplan, placement, CTS, routing, ECO, Physical Verification Proficiency in back-end design tools, such as Cadence Genus/Innovus/Tempus/Voltus Excellent problem-solving skills and attention to detail Effective communication and collaboration skills Responsibilities: Synthesis to GDSII Perform full Physical design flow and its verification Work closely with Digital Design and DFT engineers Ensure...
Hello Dear Readers, Currently at Google India vacancy for Silicon Engineer role. Minimum qualifications: Bachelor's, Master's, or Dual Degree in Electrical, Electronics and Communication Engineering, or relevant technical fields Experience with basic design concepts and computer hardware architecture Preferred qualifications: Experience in one or more of the following areas: SoC/ASIC Design, Design Verification, Physical Design, Design for Testability Internship work, work experience, or personal project experience outside the classroom in Hardware, Electrical Engineering or Mechanical Engineering Experience with Verilog/HDL or System Verilog coding Responsibilities: Work with the SoC teams to develop power and performance optimized chips. Contribute to the design, verification, and silicon implementation of ASICs and SoCs. Work on design concepts around CPUs, image processing, machine learning, computer vision, security, and video. Collaborate with teams in automating...