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Internship - SoC /IP Design at NXP India

Hello Dear Readers, Currently, at NXP India  vacancy for  Internship - SoC /IP Design   role.   We are looking for a Master degree student with Electronics and Communication Engineering, or related field, with an emphasis on SoC design. This is a full-time internship with a duration of about 11-12 months. Job Responsibility: Working with our experienced design team to design state of the art SoC hardware specific segment applications like Automotive, IoT, voice/object recognition, security, smart connectivity and touch sensing . Assisting experienced engineers with End-to-end ownership of SoC Design, Verification and implementation (Physical Design). Design and verify digital and Mixed-signal IPs. Document designs and present results. Job Qualification: Master student in electronic/computer engineering Creative and positive mindset Good knowledge on CMOS technologies Great communication skills, interpersonal skills, teamwork skills and can-do attitude Desire for a career in IC design/S
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Silicon Engineering Intern at Microsoft India

  Hello Dear Readers, Currently, at Microsoft India  vacancy for Silicon Engineering Intern role. At Microsoft, Interns work on real-world projects in collaboration with teams across the world, while having fun along the way. You’ll be empowered to build community, explore your passions and achieve your goals. This is your chance to bring your solutions and ideas to life while working on cutting-edge technology. Microsoft’s mission is to empower every person and every organization on the planet to achieve more. As employees we come together with a growth mindset, innovate to empower others, and collaborate to realize our shared goals. Each day we build on our values of respect, integrity, and accountability to create a culture of inclusion where everyone can thrive at work and beyond. Qualifications: Currently pursuing a bachelor’s degree in Electronics Engineering, Electrical & Electronics/Computer Science Engineering.   Preferred Qualifications (PQs):   Experience or classes in t

Engineer I-CAD at Silicon Labs

   Hello Dear Readers, Currently, at Silicon Labs   Hyderabad  vacancy for  Engineer I-CAD role.  As a senior member of our CAD team, you will determine, develop and support infrastructure needs and design flows for our rapidly growing IoT product division. This is a high visibility role, which requires fluid interaction with Silicon Labs’ CAD, DevOps, IT, IP, PDK, PV and Design teams. The candidate should have an excellent grasp of design data management practices, EDA tools, LSF, and diverse processes & platforms for deep submicron design and compute environments for chip design for modern hardware systems. Proven experience working on design and compute environments will be greatly preferred for this role. Proven experience working across a range of process nodes from smaller geometries (22nm and below) to high voltage processes (0.5u) is critical for the role. Key Qualifications: Ideal candidate should have 3+ years of experience in chip design CAD with exposure to EDA tools fr

CPU RTL Power Management Design Engineer at Qualcomm

  Hello Dear Readers, Currently, at Qualcomm Bangalore vacancy for CPU RTL Power Management Design Engineer role. As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems,  Digital/Analog/RF/optical  systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products. Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performance requirements. Requirements: ● Performance exploration. Explore high performance strategies working with the CPU modeling team. ● Microarchitecture development and specification. From early high-level architectural exploration, through micro architectural research a