Hello Dear Readers, Texas Instruments Bangalore has a vacancy for the Physical Design Engineer role. We need an Physical Design Methodology Engineer to join our ATD team. The candidate should have a strong background in back-end design of ASIC/SoC chips. The ideal candidate will have a bachelor’s or master’s degree in Electrical Engineering or a related field. Requirements: 1 - 2 Years of experience in physical design Bachelor’s or master’s degree in Electrical/Electronics Engineering or a related field Strong understanding of physical design principles Must know the basics of floorplan, placement, CTS, routing, ECO, Physical Verification Proficiency in back-end design tools, such as Cadence Genus/Innovus/Tempus/Voltus Excellent problem-solving skills and attention to detail Effective communication and collaboration skills Responsibilities: Synthesis to GDSII Perform full Physical design flow and its verification Work closely with Digital Design and DFT engineers Ensure...
Hello Dear Readers, Today in this post I will provide some basics to advanced ARM's assembly language practice QA part-2, I have used the Keil tool for code writing. Q-1). Write an assembly language program for storing the sum of first ‘n=6’ terms of the series 1,4,9,16,25….. Code: ; program for the addition of the n=6 series area sum_series, code,readonly entry mov r2,#0 mov r0,#6 loop muls r1,r0,r0 ; multiply square number add r2,r2,r1 ; whole sum is stored on register "r2" subs r0,r0,#1 bne loop end Output: Q-2). Write an assembly language program to find the maximum of 3 numbers and store it at location 0x5000. Code: ; program to find maximum number of 3 and store in memory area max, code, readonly entry ldr r0,=data ldr r3,=0x5000 ldr r4,=0x03 ;create a loop of 3 ldr r1,[r0, #4] sub r4,r4,#1 again ldr r2,[r0] ...