Skip to main content

Posts

Design Engineer - STA, SD, Power, PDN at Dew Software

Hello Dear Readers,   Currently at Dew Software Bangalore vacancy for Design Engineer - STA, SD, Power, PDN role. Dew Software, a leading player in the Digital Transformation space, is seeking a skilled Design Engineer specializing in STA (Static Timing Analysis), SD (Signal Integrity), Power, and PDN (Power Delivery Network) to join our team. Working with Fortune 500 companies to support their digital innovation and transformation strategies, the Design Engineer will be responsible for ensuring the integrity and efficiency of digital designs through comprehensive analysis and optimization. Dew Software is dedicated to delivering exceptional outcomes with cutting-edge technologies, and this is an excellent opportunity to contribute to the growth and success of our clients. Responsibilities: Perform STA (Static Timing Analysis) to ensure design meets timing requirements Conduct signal integrity analysis to optimize signal integrity and minimize signal integrity issues Provide power anal
Post a Comment
Read more

SpacemiT makes important breakthroughs in RISC-V High-Performance Cores

  Hello Dear Readers,   Today in this post I will provide some deep insight into what is happening in the semiconductor industry. So hope you like it and enjoy it to improve your knowledge and awareness about the industry. So let's start it today we are discussing,  SpacemiT making significant breakthroughs in RISC-V. SpacemiT  develops its first-generation RISC-V fusion computing processor core – the X100. X100 has made significant leaps with its general-purpose and application-oriented fusion computing capabilities. The general-purpose computing performance of the X100 is better than that of the ARM A75 and it outperforms ARM A76 significantly in AI Applications, Vision Applications, and Robot Applications. As a high-performance fusion processor core in RISC-V architecture, the X100 will be used in the production of SpacemiT chips and with application scenarios that have a relatively high demand for computing power. These will include high-performance CPUs, Edge Computing, pan-in
1 comment
Read more

Design Verification Engineer at Micron Technology

  Hello Dear Readers,   Currently, at Micron Technology vacancy for Design Verification Engineer role. Join an inclusive team passionate about one thing: using their expertise in the relentless pursuit of innovation for customers and partners. The solutions we build help make everything from virtual reality experiences to breakthroughs in neural networks possible. We do it all while committing to integrity, sustainability, and giving back to our communities. Because doing so can fuel the very innovation we are pursuing. Responsibilities will include, but are not limited to: Provide verification support to design projects by simulating, analyzing, and debugging pre-silicon block level/full chip designs. Develop Test cases/Stimulus to increase the functional coverage for all DRAM and emerging memory architectures and features. Develop and maintain test benches and test vectors using simulation tools and run regressions for coverage analysis and improvements. Co-work with international co
Post a Comment
Read more

Power Integrity In VLSI Chip Design

  Hello Dear Readers,   Today in this post I will provide some deep insight into what power integrity is in VLSI chip design and what tools are available in the market. What is Power integrity: Power integrity refers to the quality and reliability of the power supply in an electronic system. In VLSI (Very Large Scale Integration) circuits, power integrity is a critical concern because the high level of integration means that a large number of transistors and other components are packed into a small area, which can lead to power distribution problems. These problems can manifest in the form of voltage droops, power supply noise, and other issues that can adversely affect the performance and reliability of the system. To ensure power integrity in VLSI circuits, designers must carefully plan the power distribution network, optimize the layout of the power and ground lines, and use techniques such as decoupling capacitors and voltage regulators to smooth out voltage variations and reduce n
2 comments
Read more

ASIC Verification Engineer at Juniper Networks

Hello Dear Readers, Currently, at Juniper Networks Banglore vacancy for an ASIC Verification Engineer role. Juniper is a leading provider of advanced routers and switches for the internet. We keep the world connected with speed, reliability, security, and ease of use. We believe in excellence and we strive to achieve that through employee motivation, training, and teamwork within a collaborative and innovative culture. Want to be a part of a fast-paced team responsible for delivering high-speed ASICs for large, complex systems? Our team at Silicon Systems Technology Group (SST) is seeking ASIC Verification Engineers to verify the next generation of ASICs for new core routers, switches, and firewalls. We are looking to hire sharp individuals with excellent communication, problem-solving, and leadership skills. Responsibilities: You will be exposed to the latest verification methodologies like UVM and enable complex feature verification suites. Architect and Develop block level verificat
Post a Comment
Read more